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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Data Structures | |
struct | stage_cache |
Enumerations | |
enum | { STAGE_RAMSTAGE , STAGE_REFCODE , STAGE_POSTCAR } |
enum | { STAGE_S3_DATA } |
Functions | |
static void | stage_cache_add (int stage_id, const struct prog *stage) |
static void | stage_cache_load_stage (int stage_id, struct prog *stage) |
static void | stage_cache_add_raw (int stage_id, const void *base, const size_t size) |
static void | stage_cache_get_raw (int stage_id, void **base, size_t *size) |
static int | resume_from_stage_cache (void) |
void | stage_cache_external_region (void **base, size_t *size) |
anonymous enum |
Enumerator | |
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STAGE_RAMSTAGE | |
STAGE_REFCODE | |
STAGE_POSTCAR |
Definition at line 12 of file stage_cache.h.
anonymous enum |
Enumerator | |
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STAGE_S3_DATA |
Definition at line 19 of file stage_cache.h.
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inlinestatic |
Definition at line 42 of file stage_cache.h.
References CONFIG, and romstage_handoff_is_resume().
Referenced by agesa_map_stage_file_ramstage(), fsp_load(), fsps_load(), load_reference_code(), run_postcar_phase(), and run_ramstage().
Definition at line 35 of file stage_cache.h.
Referenced by agesa_map_stage_file_ramstage(), fsp_load(), fsps_load(), load_postcar_cbfs(), load_reference_code(), and run_ramstage().
Definition at line 37 of file stage_cache.h.
Referenced by OemS3Save().
Definition at line 61 of file tseg_region.c.
References base, BIOS_ERR, NULL, printk, smm_subregion(), and SMM_SUBREGION_CACHE.
Referenced by stage_cache_create_empty(), and stage_cache_recover().
Definition at line 38 of file stage_cache.h.
Referenced by OemS3LateRestore().
Definition at line 36 of file stage_cache.h.
Referenced by agesa_map_stage_file_ramstage(), fsp_load(), fsps_load(), load_reference_code(), run_postcar_phase(), and run_ramstage_from_resume().