coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
tseg_region.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <assert.h>
4 #include <commonlib/helpers.h>
5 #include <console/console.h>
6 #include <cpu/x86/smm.h>
7 #include <stage_cache.h>
8 #include <types.h>
9 #include <inttypes.h>
10 
11 /*
12  * Subregions within SMM
13  * +-------------------------+
14  * | IED | IED_REGION_SIZE
15  * +-------------------------+
16  * | External Stage Cache | SMM_RESERVED_SIZE
17  * +-------------------------+
18  * | code and data |
19  * | (TSEG) |
20  * +-------------------------+ TSEG
21  */
22 int smm_subregion(int sub, uintptr_t *start, size_t *size)
23 {
24  uintptr_t sub_base;
25  size_t sub_size;
26  const size_t ied_size = CONFIG_IED_REGION_SIZE;
27  const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
28 
29  smm_region(&sub_base, &sub_size);
30 
31  ASSERT(IS_ALIGNED(sub_base, sub_size));
32  ASSERT(sub_size > (cache_size + ied_size));
33 
34  switch (sub) {
36  /* Handler starts at the base of TSEG. */
37  sub_size -= ied_size;
38  sub_size -= cache_size;
39  break;
41  /* External cache is in the middle of TSEG. */
42  sub_base += sub_size - (ied_size + cache_size);
43  sub_size = cache_size;
44  break;
46  /* IED is at the top. */
47  sub_base += sub_size - ied_size;
48  sub_size = ied_size;
49  break;
50  default:
51  *start = 0;
52  *size = 0;
53  return -1;
54  }
55 
56  *start = sub_base;
57  *size = sub_size;
58  return 0;
59 }
60 
61 void stage_cache_external_region(void **base, size_t *size)
62 {
64  printk(BIOS_ERR, "No cache SMM subregion.\n");
65  *base = NULL;
66  *size = 0;
67  }
68 }
69 
70 void smm_list_regions(void)
71 {
73  size_t size;
74  int i;
75 
76  smm_region(&base, &size);
77  if (!size)
78  return;
79 
80  printk(BIOS_DEBUG, "SMM Memory Map\n");
81  printk(BIOS_DEBUG, "SMRAM : 0x%" PRIxPTR " 0x%zx\n", base, size);
82 
83  for (i = 0; i < SMM_SUBREGION_NUM; i++) {
84  if (smm_subregion(i, &base, &size))
85  continue;
86  printk(BIOS_DEBUG, " Subregion %d: 0x%" PRIxPTR " 0x%zx\n", i, base, size);
87  }
88 }
#define ASSERT(x)
Definition: assert.h:44
#define IS_ALIGNED(x, a)
Definition: helpers.h:19
#define printk(level,...)
Definition: stdlib.h:16
@ SMM_SUBREGION_CACHE
Definition: smm.h:173
@ SMM_SUBREGION_NUM
Definition: smm.h:177
@ SMM_SUBREGION_HANDLER
Definition: smm.h:171
@ SMM_SUBREGION_CHIPSET
Definition: smm.h:175
void smm_region(uintptr_t *start, size_t *size)
Definition: memmap.c:50
#define PRIxPTR
Definition: inttypes.h:45
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
Definition: loglevel.h:72
uintptr_t base
Definition: uart.c:17
#define NULL
Definition: stddef.h:19
unsigned long uintptr_t
Definition: stdint.h:21
void stage_cache_external_region(void **base, size_t *size)
Definition: tseg_region.c:61
void smm_list_regions(void)
Definition: tseg_region.c:70
int smm_subregion(int sub, uintptr_t *start, size_t *size)
Definition: tseg_region.c:22