#include <dramc_register.h>
Definition at line 349 of file dramc_register.h.
◆ _rsvd
uint32_t dramc_ddrphy_ao_regs::_rsvd[24] |
◆ _rsvd_0
uint32_t dramc_ddrphy_ao_regs::_rsvd_0[4] |
◆ _rsvd_1
uint32_t dramc_ddrphy_ao_regs::_rsvd_1[11] |
◆ _rsvd_b
uint32_t dramc_ddrphy_ao_regs::_rsvd_b[54] |
◆ [1/2]
struct { ... } dramc_ddrphy_ao_regs::b[2] |
◆ [2/2]
struct { ... } dramc_ddrphy_ao_regs::b[2] |
◆ b0_rxdvs
uint32_t dramc_ddrphy_ao_regs::b0_rxdvs[2] |
◆ b1_rxdvs
uint32_t dramc_ddrphy_ao_regs::b1_rxdvs[2] |
◆ ca_cmd
uint32_t dramc_ddrphy_ao_regs::ca_cmd[11] |
◆ ca_dll_fine_tune
uint32_t dramc_ddrphy_ao_regs::ca_dll_fine_tune[6] |
◆ ca_rxdvs0
uint32_t dramc_ddrphy_ao_regs::ca_rxdvs0 |
◆ ca_rxdvs1
uint32_t dramc_ddrphy_ao_regs::ca_rxdvs1 |
◆ ca_tx_mck
uint32_t dramc_ddrphy_ao_regs::ca_tx_mck |
◆ ckmux_sel
uint32_t dramc_ddrphy_ao_regs::ckmux_sel |
◆ dll_fine_tune
uint32_t dramc_ddrphy_ao_regs::dll_fine_tune[6] |
◆ dq
◆ dvfs_emi_clk
uint32_t dramc_ddrphy_ao_regs::dvfs_emi_clk |
◆ misc_cg_ctrl0
uint32_t dramc_ddrphy_ao_regs::misc_cg_ctrl0 |
◆ misc_cg_ctrl1
uint32_t dramc_ddrphy_ao_regs::misc_cg_ctrl1 |
◆ misc_cg_ctrl2
uint32_t dramc_ddrphy_ao_regs::misc_cg_ctrl2 |
◆ misc_cg_ctrl3
uint32_t dramc_ddrphy_ao_regs::misc_cg_ctrl3 |
◆ misc_cg_ctrl4
uint32_t dramc_ddrphy_ao_regs::misc_cg_ctrl4 |
◆ misc_cg_ctrl5
uint32_t dramc_ddrphy_ao_regs::misc_cg_ctrl5 |
◆ misc_ctrl0
uint32_t dramc_ddrphy_ao_regs::misc_ctrl0 |
◆ misc_ctrl1
uint32_t dramc_ddrphy_ao_regs::misc_ctrl1 |
◆ misc_ctrl2
uint32_t dramc_ddrphy_ao_regs::misc_ctrl2 |
◆ misc_ctrl3
uint32_t dramc_ddrphy_ao_regs::misc_ctrl3 |
◆ misc_ctrl4
uint32_t dramc_ddrphy_ao_regs::misc_ctrl4 |
◆ misc_ctrl5
uint32_t dramc_ddrphy_ao_regs::misc_ctrl5 |
◆ misc_extlb
uint32_t dramc_ddrphy_ao_regs::misc_extlb[24] |
◆ misc_extlb_rx
uint32_t dramc_ddrphy_ao_regs::misc_extlb_rx[21] |
◆ misc_imp_ctrl0
uint32_t dramc_ddrphy_ao_regs::misc_imp_ctrl0 |
◆ misc_imp_ctrl1
uint32_t dramc_ddrphy_ao_regs::misc_imp_ctrl1 |
◆ misc_rxdvs
uint32_t dramc_ddrphy_ao_regs::misc_rxdvs[3] |
◆ misc_shu_opt
uint32_t dramc_ddrphy_ao_regs::misc_shu_opt |
◆ misc_spm_ctrl0
uint32_t dramc_ddrphy_ao_regs::misc_spm_ctrl0 |
◆ misc_spm_ctrl1
uint32_t dramc_ddrphy_ao_regs::misc_spm_ctrl1 |
◆ misc_spm_ctrl2
uint32_t dramc_ddrphy_ao_regs::misc_spm_ctrl2 |
◆ misc_spm_ctrl3
uint32_t dramc_ddrphy_ao_regs::misc_spm_ctrl3 |
◆ misc_stberr_rk0_f
uint32_t dramc_ddrphy_ao_regs::misc_stberr_rk0_f |
◆ misc_stberr_rk0_r
uint32_t dramc_ddrphy_ao_regs::misc_stberr_rk0_r |
◆ misc_stberr_rk1_f
uint32_t dramc_ddrphy_ao_regs::misc_stberr_rk1_f |
◆ misc_stberr_rk1_r
uint32_t dramc_ddrphy_ao_regs::misc_stberr_rk1_r |
◆ misc_stberr_rk2_f
uint32_t dramc_ddrphy_ao_regs::misc_stberr_rk2_f |
◆ misc_stberr_rk2_r
uint32_t dramc_ddrphy_ao_regs::misc_stberr_rk2_r |
◆ misc_vref_ctrl
uint32_t dramc_ddrphy_ao_regs::misc_vref_ctrl |
◆ pll1
◆ pll10
◆ pll11
◆ pll12
◆ pll13
◆ pll14
◆ pll15
◆ pll16
◆ pll2
◆ pll3
◆ pll4
◆ pll5
◆ pll6
◆ pll7
◆ pll8
◆ pll9
struct { ... } dramc_ddrphy_ao_regs::r[3] |
◆ r0_ca_rxdvs
uint32_t dramc_ddrphy_ao_regs::r0_ca_rxdvs[10] |
◆ reserved0
uint32_t dramc_ddrphy_ao_regs::reserved0[16] |
◆ reserved3
uint32_t dramc_ddrphy_ao_regs::reserved3[11] |
◆ reserved4
uint32_t dramc_ddrphy_ao_regs::reserved4[129] |
◆ reserved5
uint32_t dramc_ddrphy_ao_regs::reserved5[46] |
◆ rfu_0x1c4
uint32_t dramc_ddrphy_ao_regs::rfu_0x1c4 |
◆ rfu_0x1c8
uint32_t dramc_ddrphy_ao_regs::rfu_0x1c8 |
◆ rfu_0x1cc
uint32_t dramc_ddrphy_ao_regs::rfu_0x1cc |
◆ rfu_0x5ec
uint32_t dramc_ddrphy_ao_regs::rfu_0x5ec |
◆ rfu_0x5f8
uint32_t dramc_ddrphy_ao_regs::rfu_0x5f8 |
◆ rfu_0x5fc
uint32_t dramc_ddrphy_ao_regs::rfu_0x5fc |
◆ rsvd_2
uint32_t dramc_ddrphy_ao_regs::rsvd_2[28] |
◆ rsvd_3
uint32_t dramc_ddrphy_ao_regs::rsvd_3[30] |
◆ rsvd_4
uint32_t dramc_ddrphy_ao_regs::rsvd_4[2] |
◆ rxdvs
uint32_t dramc_ddrphy_ao_regs::rxdvs[10] |
◆ shu
◆ tx_mck
The documentation for this struct was generated from the following file: