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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Macros | |
#define | SPD_LEN 256 |
#define | SPD_DRAM_TYPE 2 |
#define | SPD_DRAM_DDR3 0x0b |
#define | SPD_DRAM_LPDDR3 0xf1 |
#define | SPD_DENSITY_BANKS 4 |
#define | SPD_ADDRESSING 5 |
#define | SPD_ORGANIZATION 7 |
#define | SPD_BUS_DEV_WIDTH 8 |
#define | SPD_PART_OFF 128 |
#define | SPD_PART_LEN 18 |
#define | SPD_MANU_OFF 148 |
#define | HYNIX_SINGLE_CHAN 0x1 |
#define | SAMSUNG_SINGLE_CHAN 0x4 |
#define | MIC_SINGLE_CHAN 0x5 |
#define | MAX_MEMORY_CONFIG 0x10 |
#define | K4E6E304EE_MEM_ID 0x3 |
Functions | |
static int | get_spd_index (void) |
void | mainboard_fill_dq_map_data (void *dq_map_ch0, void *dq_map_ch1) |
void | mainboard_fill_dqs_map_data (void *dqs_map_ch0, void *dqs_map_ch1) |
void | mainboard_fill_rcomp_res_data (void *rcomp_ptr) |
void | mainboard_fill_rcomp_strength_data (void *rcomp_strength_ptr) |
uintptr_t | mainboard_get_spd_data (void) |
int | mainboard_has_dual_channel_mem (void) |
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inlinestatic |
Definition at line 32 of file spd.h.
References ARRAY_SIZE, gpio_base2_value(), GPIO_MEM_CONFIG_0, GPIO_MEM_CONFIG_1, GPIO_MEM_CONFIG_2, and GPIO_MEM_CONFIG_3.
Definition at line 9 of file spd_util.c.
Definition at line 21 of file spd_util.c.
Definition at line 28 of file spd_util.c.
Definition at line 36 of file spd_util.c.
Definition at line 75 of file spd.c.
References BIOS_ERR, BIOS_INFO, cbfs_map(), die(), get_spd_index(), mainboard_get_spd_index(), mainboard_print_spd_info(), printk, spd_index, and SPD_LEN.
int mainboard_has_dual_channel_mem | ( | void | ) |
Definition at line 89 of file spd_util.c.
References BIOS_INFO, get_spd_index(), HYNIX_SINGLE_CHAN, MIC_SINGLE_CHAN, printk, SAMSUNG_SINGLE_CHAN, and spd_index.
Referenced by mainboard_memory_init_params().