coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <fsp/api.h>
4 #include <gpio.h>
5 #include "gpio.h"
6 #include <soc/romstage.h>
7 #include <soc/gpio.h>
8 #include "spd/spd.h"
9 
10 void mainboard_memory_init_params(FSPM_UPD *mupd)
11 {
12  FSP_M_CONFIG *mem_cfg;
13  mem_cfg = &mupd->FspmConfig;
14 
15  mainboard_fill_dq_map_data(&mem_cfg->DqByteMapCh0, &mem_cfg->DqByteMapCh1);
16  mainboard_fill_dqs_map_data(&mem_cfg->DqsMapCpu2DramCh0, &mem_cfg->DqsMapCpu2DramCh1);
17  mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor);
18  mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
19 
20  mem_cfg->DqPinsInterleaved = 0;
21  mem_cfg->MemorySpdPtr00 = mainboard_get_spd_data();
23  mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00;
24  mem_cfg->MemorySpdDataLen = SPD_LEN;
25 }
#define FSP_M_CONFIG
Definition: fsp_upd.h:8
void mainboard_memory_init_params(FSPM_UPD *mupd)
Definition: romstage.c:22
#define SPD_LEN
Definition: spd.c:22
static uintptr_t mainboard_get_spd_data(enum memory_type type, bool use_sec_spd)
Definition: romstage.c:102
int mainboard_has_dual_channel_mem(void)
Definition: spd_util.c:89
static void mainboard_fill_dq_map_data(void *dq_map_ch0, void *dq_map_ch1)
Definition: romstage.c:8
static void mainboard_fill_dqs_map_data(void *dqs_map_ch0, void *dqs_map_ch1)
Definition: romstage.c:19
static void mainboard_fill_rcomp_res_data(void *rcomp_ptr)
Definition: romstage.c:7
static void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr)
Definition: romstage.c:13