coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ec.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <acpi/acpi.h>
4 #include <amdblocks/gpio.h>
5 #include <amdblocks/smi.h>
7 #include <soc/smi.h>
8 #include <variant/ec.h>
9 
10 static const struct sci_source espi_sci_sources[] = {
11  {
13  .gpe = EC_SCI_GPI,
14  .direction = SMI_SCI_LVL_HIGH, /* enum smi_sci_lvl */
15  .level = SMI_SCI_EDG, /* enum smi_sci_dir */
16  }
17 };
18 
20 {
21  const struct google_chromeec_event_info info = {
22  .log_events = MAINBOARD_EC_LOG_EVENTS,
23  .sci_events = MAINBOARD_EC_SCI_EVENTS,
24  .s3_wake_events = MAINBOARD_EC_S3_WAKE_EVENTS,
25  .s5_wake_events = MAINBOARD_EC_S5_WAKE_EVENTS,
26  .s0ix_wake_events = MAINBOARD_EC_S0IX_WAKE_EVENTS,
27  };
28 
30 
31  /* Configure eSPI VW SCI events */
33 }
static int acpi_is_wakeup_s3(void)
Definition: acpi.h:9
#define ARRAY_SIZE(a)
Definition: helpers.h:12
static struct smmstore_params_info info
Definition: ramstage.c:12
void google_chromeec_events_init(const struct google_chromeec_event_info *info, bool is_s3_wakeup)
Definition: ec.c:410
void mainboard_ec_init(void)
Definition: ec.c:8
#define MAINBOARD_EC_S5_WAKE_EVENTS
Definition: ec.h:32
#define MAINBOARD_EC_SCI_EVENTS
Definition: ec.h:12
#define EC_SCI_GPI
Definition: ec.h:9
#define MAINBOARD_EC_LOG_EVENTS
Definition: ec.h:42
#define MAINBOARD_EC_S3_WAKE_EVENTS
Definition: ec.h:37
#define MAINBOARD_EC_S0IX_WAKE_EVENTS
Definition: ec.h:25
static const struct sci_source espi_sci_sources[]
Definition: ec.c:10
#define SMITYPE_ESPI_SCI_B
Definition: smi.h:82
@ SMI_SCI_EDG
Definition: smi.h:28
@ SMI_SCI_LVL_HIGH
Definition: smi.h:24
void gpe_configure_sci(const struct sci_source *scis, size_t num_gpes)
Definition: smi_util.c:116
Definition: smi.h:37
uint8_t scimap
Definition: smi.h:38