coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c File Reference
#include <string.h>
#include <soc/romstage.h>
#include <fsp/api.h>
#include <FspmUpd.h>
Include dependency graph for romstage.c:

Go to the source code of this file.

Functions

void mainboard_memory_init_params (FSPM_UPD *memupd)
 

Variables

static const uint8_t Ch0_Bit_swizzling []
 
static const uint8_t Ch1_Bit_swizzling []
 
static const uint8_t Ch2_Bit_swizzling []
 
static const uint8_t Ch3_Bit_swizzling []
 

Function Documentation

◆ mainboard_memory_init_params()

void mainboard_memory_init_params ( FSPM_UPD *  memupd)

Definition at line 33 of file romstage.c.

References Ch0_Bit_swizzling, Ch1_Bit_swizzling, Ch2_Bit_swizzling, Ch3_Bit_swizzling, and memcpy().

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Variable Documentation

◆ Ch0_Bit_swizzling

const uint8_t Ch0_Bit_swizzling[]
static
Initial value:
= {
0x09, 0x0e, 0x0c, 0x0d, 0x0a, 0x0b, 0x08, 0x0f,
0x05, 0x06, 0x01, 0x00, 0x02, 0x07, 0x04, 0x03,
0x1a, 0x1f, 0x1c, 0x1b, 0x1d, 0x19, 0x18, 0x1e,
0x14, 0x16, 0x17, 0x11, 0x12, 0x13, 0x10, 0x15
}

Definition at line 8 of file romstage.c.

Referenced by mainboard_memory_init_params().

◆ Ch1_Bit_swizzling

const uint8_t Ch1_Bit_swizzling[]
static
Initial value:
= {
0x06, 0x07, 0x05, 0x04, 0x03, 0x01, 0x00, 0x02,
0x0c, 0x0a, 0x0b, 0x0d, 0x0e, 0x08, 0x09, 0x0f,
0x14, 0x10, 0x16, 0x15, 0x12, 0x11, 0x13, 0x17,
0x1e, 0x1c, 0x1d, 0x19, 0x18, 0x1a, 0x1b, 0x1f
}

Definition at line 14 of file romstage.c.

Referenced by mainboard_memory_init_params().

◆ Ch2_Bit_swizzling

const uint8_t Ch2_Bit_swizzling[]
static
Initial value:
= {
0x0f, 0x09, 0x08, 0x0b, 0x0c, 0x0d, 0x0e, 0x0a,
0x05, 0x02, 0x00, 0x03, 0x06, 0x07, 0x01, 0x04,
0x19, 0x1c, 0x1e, 0x1f, 0x1a, 0x1b, 0x18, 0x1d,
0x14, 0x17, 0x16, 0x15, 0x12, 0x13, 0x10, 0x11
}

Definition at line 20 of file romstage.c.

Referenced by mainboard_memory_init_params().

◆ Ch3_Bit_swizzling

const uint8_t Ch3_Bit_swizzling[]
static
Initial value:
= {
0x03, 0x04, 0x06, 0x05, 0x00, 0x01, 0x02, 0x07,
0x0b, 0x0a, 0x08, 0x09, 0x0e, 0x0c, 0x0f, 0x0d,
0x11, 0x17, 0x13, 0x10, 0x15, 0x16, 0x14, 0x12,
0x1c, 0x1d, 0x1a, 0x19, 0x1e, 0x1b, 0x18, 0x1f
}

Definition at line 26 of file romstage.c.

Referenced by mainboard_memory_init_params().