coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ec.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
bootmode.h
>
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#include <types.h>
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#include <
console/console.h
>
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#include <
ec/quanta/it8518/ec.h
>
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#include <
device/device.h
>
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#include <
southbridge/intel/bd82x6x/pch.h
>
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#include <
southbridge/intel/common/pmbase.h
>
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#include "
ec.h
"
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void
stout_ec_init
(
void
)
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{
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printk
(
BIOS_DEBUG
,
"%s: EC FW version %x%x\n"
, __func__,
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ec_read
(
EC_FW_VER
),
ec_read
(
EC_FW_VER
+ 1));
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/*
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* Important: get_recovery_mode_switch() must be called in EC init.
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*/
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get_recovery_mode_switch
();
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/* Unmute */
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ec_kbc_write_cmd
(
EC_KBD_CMD_UNMUTE
);
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/*
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* Set USB Power off in S3 (enabled in S3 path if requested in gnvs)
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* Bit0 of 0x0D/Bit0 of 0x26
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* 0/0 All USB port off
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* 1/0 USB on, all USB port didn't support wake up
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* 0/1 USB on, yellow port support wake up charge, but may not support
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* charge smart phone.
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* 1/1 USB on, yellow port in AUTO mode and didn't support wake up system.
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*/
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ec_write
(
EC_PERIPH_CNTL_3
,
ec_read
(
EC_PERIPH_CNTL_3
) & 0xE);
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ec_write
(
EC_USB_S3_EN
,
ec_read
(
EC_USB_S3_EN
) & 0xE);
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// TODO: Power Limit Setting
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}
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void
stout_ec_finalize_smm
(
void
)
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{
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u8
ec_reg, critical_shutdown = 0;
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/*
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* Check EC for error conditions.
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*/
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/* Fan Error : Peripheral Status 3 (0x35) bit 4 */
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ec_reg =
ec_read
(
EC_PERIPH_STAT_3
);
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if
(ec_reg & 0x8) {
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printk
(
BIOS_ERR
,
" EC Fan Error\n"
);
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critical_shutdown = 1;
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}
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/* Thermal Device Error : Peripheral Status 3 (0x35) bit 8 */
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if
(ec_reg & 0x80) {
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printk
(
BIOS_ERR
,
" EC Thermal Device Error\n"
);
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critical_shutdown = 1;
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}
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/* Critical Battery Error */
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ec_reg =
ec_read
(
EC_MBAT_STATUS
);
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if
((ec_reg & 0xCF) == 0xC0) {
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printk
(
BIOS_ERR
,
" EC Critical Battery Error\n"
);
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critical_shutdown = 1;
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}
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if
((ec_reg & 0x8F) == 0x8F) {
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printk
(
BIOS_ERR
,
" EC Read Battery Error\n"
);
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}
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if
(critical_shutdown) {
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printk
(
BIOS_ERR
,
"EC critical_shutdown"
);
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/* Go to S5 */
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write_pmbase32
(
PM1_CNT
,
read_pmbase32
(
PM1_CNT
) | (0xf << 10));
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}
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}
PM1_CNT
#define PM1_CNT
Definition:
pm.h:27
bootmode.h
printk
#define printk(level,...)
Definition:
stdlib.h:16
console.h
ec_read
u8 ec_read(u8 addr)
Definition:
ec.c:107
ec_write
int ec_write(u8 addr, u8 data)
Definition:
ec.c:115
ec_kbc_write_cmd
void ec_kbc_write_cmd(u8 cmd)
Definition:
ec.c:77
ec.h
EC_PERIPH_STAT_3
#define EC_PERIPH_STAT_3
Definition:
ec.h:52
EC_USB_S3_EN
#define EC_USB_S3_EN
Definition:
ec.h:51
EC_FW_VER
#define EC_FW_VER
Definition:
ec.h:55
EC_MBAT_STATUS
#define EC_MBAT_STATUS
Definition:
ec.h:59
EC_PERIPH_CNTL_3
#define EC_PERIPH_CNTL_3
Definition:
ec.h:50
EC_KBD_CMD_UNMUTE
#define EC_KBD_CMD_UNMUTE
Definition:
ec.h:26
device.h
BIOS_DEBUG
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition:
loglevel.h:128
BIOS_ERR
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
Definition:
loglevel.h:72
stout_ec_init
void stout_ec_init(void)
Definition:
ec.c:12
stout_ec_finalize_smm
void stout_ec_finalize_smm(void)
Definition:
ec.c:41
ec.h
read_pmbase32
u32 read_pmbase32(const u8 addr)
Definition:
pmbase.c:57
write_pmbase32
void write_pmbase32(const u8 addr, const u32 val)
Definition:
pmbase.c:36
pmbase.h
pch.h
u8
uint8_t u8
Definition:
stdint.h:45
get_recovery_mode_switch
int get_recovery_mode_switch(void)
Definition:
switches.c:17
src
mainboard
google
stout
ec.c
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