coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
usb_common.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include "qmp_usb_phy.h"
4 
5 /* QSCRATCH_GENERAL_CFG register bit offset */
6 #define PIPE_UTMI_CLK_SEL BIT(0)
7 #define PIPE3_PHYSTATUS_SW BIT(3)
8 #define PIPE_UTMI_CLK_DIS BIT(8)
9 
10 /* Global USB3 Control Registers */
11 #define DWC3_GUSB3PIPECTL_DELAYP1TRANS BIT(18)
12 #define DWC3_GUSB3PIPECTL_UX_EXIT_IN_PX BIT(27)
13 #define DWC3_GCTL_PRTCAPDIR(n) ((n) << 12)
14 #define DWC3_GCTL_PRTCAP_OTG 3
15 #define DWC3_GCTL_PRTCAP_HOST 1
16 
17 /* Global USB2 PHY Configuration Register */
18 #define DWC3_GUSB2PHYCFG_USBTRDTIM(n) ((n) << 10)
19 #define DWC3_GUSB2PHYCFG_USB2TRDTIM_MASK DWC3_GUSB2PHYCFG_USBTRDTIM(0xf)
20 #define DWC3_GUSB2PHYCFG_PHYIF(n) ((n) << 3)
21 #define DWC3_GUSB2PHYCFG_PHYIF_MASK DWC3_GUSB2PHYCFG_PHYIF(1)
22 #define USBTRDTIM_UTMI_8_BIT 9
23 #define UTMI_PHYIF_8_BIT 0
24 
25 #define DWC3_GCTL_SCALEDOWN(n) ((n) << 4)
26 #define DWC3_GCTL_SCALEDOWN_MASK DWC3_GCTL_SCALEDOWN(3)
27 #define DWC3_GCTL_DISSCRAMBLE (1 << 3)
28 #define DWC3_GCTL_U2EXIT_LFPS (1 << 2)
29 #define DWC3_GCTL_DSBLCLKGTNG (1 << 0)
30 
31 void hs_usb_phy_init(void *board_data);
32 void setup_usb_host0(void *board_data);
33 
34 /* Call reset_ before setup_ */
35 void reset_usb0(void);
void hs_usb_phy_init(void *board_data)
Definition: qusb_phy.c:93
void reset_usb0(void)
Definition: usb.c:75
void setup_usb_host0(void *board_data)
Definition: usb.c:137