coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
usb_common.h File Reference
#include "qmp_usb_phy.h"
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Macros

#define PIPE_UTMI_CLK_SEL   BIT(0)
 
#define PIPE3_PHYSTATUS_SW   BIT(3)
 
#define PIPE_UTMI_CLK_DIS   BIT(8)
 
#define DWC3_GUSB3PIPECTL_DELAYP1TRANS   BIT(18)
 
#define DWC3_GUSB3PIPECTL_UX_EXIT_IN_PX   BIT(27)
 
#define DWC3_GCTL_PRTCAPDIR(n)   ((n) << 12)
 
#define DWC3_GCTL_PRTCAP_OTG   3
 
#define DWC3_GCTL_PRTCAP_HOST   1
 
#define DWC3_GUSB2PHYCFG_USBTRDTIM(n)   ((n) << 10)
 
#define DWC3_GUSB2PHYCFG_USB2TRDTIM_MASK   DWC3_GUSB2PHYCFG_USBTRDTIM(0xf)
 
#define DWC3_GUSB2PHYCFG_PHYIF(n)   ((n) << 3)
 
#define DWC3_GUSB2PHYCFG_PHYIF_MASK   DWC3_GUSB2PHYCFG_PHYIF(1)
 
#define USBTRDTIM_UTMI_8_BIT   9
 
#define UTMI_PHYIF_8_BIT   0
 
#define DWC3_GCTL_SCALEDOWN(n)   ((n) << 4)
 
#define DWC3_GCTL_SCALEDOWN_MASK   DWC3_GCTL_SCALEDOWN(3)
 
#define DWC3_GCTL_DISSCRAMBLE   (1 << 3)
 
#define DWC3_GCTL_U2EXIT_LFPS   (1 << 2)
 
#define DWC3_GCTL_DSBLCLKGTNG   (1 << 0)
 

Functions

void hs_usb_phy_init (void *board_data)
 
void setup_usb_host0 (void *board_data)
 
void reset_usb0 (void)
 

Macro Definition Documentation

◆ DWC3_GCTL_DISSCRAMBLE

#define DWC3_GCTL_DISSCRAMBLE   (1 << 3)

Definition at line 27 of file usb_common.h.

◆ DWC3_GCTL_DSBLCLKGTNG

#define DWC3_GCTL_DSBLCLKGTNG   (1 << 0)

Definition at line 29 of file usb_common.h.

◆ DWC3_GCTL_PRTCAP_HOST

#define DWC3_GCTL_PRTCAP_HOST   1

Definition at line 15 of file usb_common.h.

◆ DWC3_GCTL_PRTCAP_OTG

#define DWC3_GCTL_PRTCAP_OTG   3

Definition at line 14 of file usb_common.h.

◆ DWC3_GCTL_PRTCAPDIR

#define DWC3_GCTL_PRTCAPDIR (   n)    ((n) << 12)

Definition at line 13 of file usb_common.h.

◆ DWC3_GCTL_SCALEDOWN

#define DWC3_GCTL_SCALEDOWN (   n)    ((n) << 4)

Definition at line 25 of file usb_common.h.

◆ DWC3_GCTL_SCALEDOWN_MASK

#define DWC3_GCTL_SCALEDOWN_MASK   DWC3_GCTL_SCALEDOWN(3)

Definition at line 26 of file usb_common.h.

◆ DWC3_GCTL_U2EXIT_LFPS

#define DWC3_GCTL_U2EXIT_LFPS   (1 << 2)

Definition at line 28 of file usb_common.h.

◆ DWC3_GUSB2PHYCFG_PHYIF

#define DWC3_GUSB2PHYCFG_PHYIF (   n)    ((n) << 3)

Definition at line 20 of file usb_common.h.

◆ DWC3_GUSB2PHYCFG_PHYIF_MASK

#define DWC3_GUSB2PHYCFG_PHYIF_MASK   DWC3_GUSB2PHYCFG_PHYIF(1)

Definition at line 21 of file usb_common.h.

◆ DWC3_GUSB2PHYCFG_USB2TRDTIM_MASK

#define DWC3_GUSB2PHYCFG_USB2TRDTIM_MASK   DWC3_GUSB2PHYCFG_USBTRDTIM(0xf)

Definition at line 19 of file usb_common.h.

◆ DWC3_GUSB2PHYCFG_USBTRDTIM

#define DWC3_GUSB2PHYCFG_USBTRDTIM (   n)    ((n) << 10)

Definition at line 18 of file usb_common.h.

◆ DWC3_GUSB3PIPECTL_DELAYP1TRANS

#define DWC3_GUSB3PIPECTL_DELAYP1TRANS   BIT(18)

Definition at line 11 of file usb_common.h.

◆ DWC3_GUSB3PIPECTL_UX_EXIT_IN_PX

#define DWC3_GUSB3PIPECTL_UX_EXIT_IN_PX   BIT(27)

Definition at line 12 of file usb_common.h.

◆ PIPE3_PHYSTATUS_SW

#define PIPE3_PHYSTATUS_SW   BIT(3)

Definition at line 7 of file usb_common.h.

◆ PIPE_UTMI_CLK_DIS

#define PIPE_UTMI_CLK_DIS   BIT(8)

Definition at line 8 of file usb_common.h.

◆ PIPE_UTMI_CLK_SEL

#define PIPE_UTMI_CLK_SEL   BIT(0)

Definition at line 6 of file usb_common.h.

◆ USBTRDTIM_UTMI_8_BIT

#define USBTRDTIM_UTMI_8_BIT   9

Definition at line 22 of file usb_common.h.

◆ UTMI_PHYIF_8_BIT

#define UTMI_PHYIF_8_BIT   0

Definition at line 23 of file usb_common.h.

Function Documentation

◆ hs_usb_phy_init()

void hs_usb_phy_init ( void board_data)

Definition at line 93 of file qusb_phy.c.

References usb_qusb_phy_pll::analog_controls_two, usb_qusb_phy_pll::bias_ctrl_1, usb_qusb_phy_pll::bias_ctrl_2, BIOS_DEBUG, BIOS_ERR, hs_usb_phy_reg::board_data, hs_usb_phy_reg::cfg0, usb_qusb_phy_pll::clock_inverters, clrbits32, clrsetbits32, usb_qusb_phy_pll::cmode, usb_qusb_phy_dig::debug_ctrl2, DEBUG_CTRL2_MUX_PLL_LOCK_STATUS, usb_qusb_phy_dig::debug_stat5, usb_qusb_phy_pll::dig_tim, FSEL_MASK, hs_usb_phy_reg::hs_phy_ctrl1, hs_usb_phy_reg::hs_phy_ctrl2, hs_usb_phy_reg::hs_phy_ctrl_common0, hs_usb_phy_reg::hs_phy_ctrl_common1, hs_usb_phy_reg::hs_phy_ctrl_common2, hs_usb_phy_reg::hs_phy_override_x0, hs_usb_phy_reg::hs_phy_override_x1, hs_usb_phy_reg::hs_phy_override_x2, hs_usb_phy_reg::hs_phy_override_x3, hs_phy_reg, usb_qusb_phy_pll::lock_delay, PARAM_OVRD_MASK, usb_board_data::parameter_override_x0, usb_board_data::parameter_override_x1, usb_board_data::parameter_override_x2, usb_board_data::parameter_override_x3, hs_usb_phy_reg::phy_dig, hs_usb_phy_reg::phy_pll, PLLBTUNE, POR, POWER_DOWN, printk, usb_qusb_phy_dig::pwr_ctrl1, QUSB2PHY_PLL_ANALOG_CONTROLS_TWO, QUSB2PHY_PLL_BIAS_CONTROL_1, QUSB2PHY_PLL_BIAS_CONTROL_2, QUSB2PHY_PLL_CLOCK_INVERTERS, QUSB2PHY_PLL_CMODE, QUSB2PHY_PLL_DIGITAL_TIMERS_TWO, QUSB2PHY_PLL_LOCK_DELAY, qusb_phy, read32(), hs_usb_phy_reg::refclk_ctrl, REFCLK_SEL_DEFAULT, REFCLK_SEL_MASK, setbits32, SLEEPM, tune_phy(), USB2_SUSPEND_N, USB2_SUSPEND_N_SEL, hs_usb_phy_reg::utmi_ctrl0, hs_usb_phy_reg::utmi_ctrl5, UTMI_PHY_CMN_CTRL_OVERRIDE_EN, VBUSVLDEXT0, VBUSVLDEXTSEL0, VREGBYPASS, VSTATUS_PLL_LOCK_STATUS_MASK, wait_us, and write32().

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◆ reset_usb0()

void reset_usb0 ( void  )

Definition at line 75 of file usb.c.

References BIOS_INFO, printk, reset_usb(), and usb_port0.

Referenced by prepare_usb().

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◆ setup_usb_host0()

void setup_usb_host0 ( void board_data)

Definition at line 137 of file usb.c.

References BIOS_INFO, usb_dwc3_cfg::board_data, printk, setup_usb_host(), and usb_port0.

Referenced by setup_usb().

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