6 #include <soc/addressmap.h>
57 .qusb2phy_bcr = &
gcc->qusb2phy_prim_bcr,
58 .gcc_usb3phy_bcr_reg = &
gcc->usb3_dp_phy_prim_bcr,
59 .gcc_qmpphy_bcr_reg = &
gcc->usb3_phy_prim_bcr,
#define printk(level,...)
#define clrsetbits32(addr, clear, set)
#define BIOS_INFO
BIOS_INFO - Expected events.
#define BIOS_SPEW
BIOS_SPEW - Excessively verbose output.
void ss_qmp_phy_init(void)
#define DWC3_GUSB3PIPECTL_DELAYP1TRANS
#define DWC3_GUSB2PHYCFG_USB2TRDTIM_MASK
#define DWC3_GCTL_PRTCAP_HOST
#define USBTRDTIM_UTMI_8_BIT
#define DWC3_GUSB2PHYCFG_USBTRDTIM(n)
#define DWC3_GUSB2PHYCFG_PHYIF(n)
#define DWC3_GCTL_U2EXIT_LFPS
#define DWC3_GUSB3PIPECTL_UX_EXIT_IN_PX
#define DWC3_GUSB2PHYCFG_PHYIF_MASK
check_member(utmip_ctlr, pmc_wakeup, 0x84c - 0x800)
void clock_reset_bcr(void *bcr_addr, bool assert)
static void reset_usb(struct usb_dwc3_cfg *dwc3)
static void setup_dwc3(struct usb_dwc3 *dwc3)
void setup_usb_host0(void *board_data)
static struct usb_dwc3_cfg usb_port0
#define DWC3_GCTL_PRTCAP_OTG
#define DWC3_GCTL_SCALEDOWN_MASK
#define DWC3_GCTL_DISSCRAMBLE
#define DWC3_GCTL_DSBLCLKGTNG
#define DWC3_GCTL_PRTCAPDIR(n)
static struct qcs405_gcc *const gcc
static void hs_usb_phy_init(struct usb_dwc3_cfg *dwc3)
#define USB_HOST_DWC3_BASE
struct usb_board_data * board_data
struct usb_dwc3 * usb_host_dwc3
u32 * gcc_usb3phy_bcr_reg