#include <device/device.h>

Include dependency graph for pmc.h:

Macros
#define	PWRMBASE 0x10

#define	ABASE 0x20

#define	GEN_PMCON_A 0x1020

#define	DC_PP_DIS (1 << 30)

#define	DSX_PP_DIS (1 << 29)

#define	AG3_PP_EN (1 << 28)

#define	SX_PP_EN (1 << 27)

#define	ALLOW_ICLK_PLL_SD_INC0 (1 << 26)

#define	GBL_RST_STS (1 << 24)

#define	DISB (1 << 23)

#define	ALLOW_OPI_PLL_SD_INC0 (1 << 22)

#define	MEM_SR (1 << 21)

#define	ALLOW_SPXB_CG_INC0 (1 << 20)

#define	ALLOW_L1LOW_C0 (1 << 19)

#define	MS4V (1 << 18)

#define	ALLOW_L1LOW_OPI_ON (1 << 17)

#define	SUS_PWR_FLR (1 << 16)

#define	PME_B0_S5_DIS (1 << 15)

#define	PWR_FLR (1 << 14)

#define	ALLOW_L1LOW_BCLKREQ_ON (1 << 13)

#define	DIS_SLP_X_STRCH_SUS_UP (1 << 12)

#define	SLP_S3_MIN_ASST_WDTH_MASK (3 << 10)

#define	SLP_S3_MIN_ASST_WDTH_60USEC (0 << 10)

#define	SLP_S3_MIN_ASST_WDTH_1MS (1 << 10)

#define	SLP_S3_MIN_ASST_WDTH_50MS (2 << 10)

#define	SLP_S3_MIN_ASST_WDTH_2S (3 << 10)

#define	HOST_RST_STS (1 << 9)

#define	ESPI_SMI_LOCK (1 << 8)

#define	S4MAW_MASK (3 << 4)

#define	S4MAW_1S (1 << 4)

#define	S4MAW_2S (2 << 4)

#define	S4MAW_3S (3 << 4)

#define	S4MAW_4S (0 << 4)

#define	S4ASE (1 << 3)

#define	PER_SMI_SEL_MASK (3 << 1)

#define	SMI_RATE_64S (0 << 1)

#define	SMI_RATE_32S (1 << 1)

#define	SMI_RATE_16S (2 << 1)

#define	SMI_RATE_8S (3 << 1)

#define	SLEEP_AFTER_POWER_FAIL (1 << 0)

#define	GEN_PMCON_B 0x1024

#define	SLP_STR_POL_LOCK (1 << 18)

#define	ACPI_BASE_LOCK (1 << 17)

#define	PM_DATA_BAR_DIS (1 << 16)

#define	WOL_EN_OVRD (1 << 13)

#define	BIOS_PCI_EXP_EN (1 << 10)

#define	PWRBTN_LVL (1 << 9)

#define	SMI_LOCK (1 << 4)

#define	RTC_BATTERY_DEAD (1 << 2)

#define	ETR 0x1048

#define	CF9_LOCK (1 << 31)

#define	CF9_GLB_RST (1 << 20)

#define	SSML 0x104C

#define	SSML_SSL_DS (0 << 0)

#define	SSML_SSL_EN (1 << 0)

#define	SSMC 0x1050

#define	SSMC_SSMS (1 << 0)

#define	SSMD 0x1054

#define	SSMD_SSD_MASK (0xffff << 0)

#define	PRSTS 0x1810

#define	S3_PWRGATE_POL 0x1828

#define	S3DC_GATE_SUS (1 << 1)

#define	S3AC_GATE_SUS (1 << 0)

#define	S4_PWRGATE_POL 0x182c

#define	S4DC_GATE_SUS (1 << 1)

#define	S4AC_GATE_SUS (1 << 0)

#define	S5_PWRGATE_POL 0x1830

#define	S5DC_GATE_SUS (1 << 15)

#define	S5AC_GATE_SUS (1 << 14)

#define	DSX_CFG 0x1834

#define	REQ_CNV_NOWAKE_DSX (1 << 4)

#define	REQ_BATLOW_DSX (1 << 3)

#define	DSX_EN_WAKE_PIN (1 << 2)

#define	DSX_DIS_AC_PRESENT_PD (1 << 1)

#define	DSX_EN_LAN_WAKE_PIN (1 << 0)

#define	DSX_CFG_MASK (0x1f << 0)

#define	PMSYNC_TPR_CFG 0x18C4

#define	PCH2CPU_TPR_CFG_LOCK (1 << 31)

#define	PCH2CPU_TT_EN (1 << 26)

#define	PCH_PWRM_ACPI_TMR_CTL 0x18FC

#define	ACPI_TIM_DIS (1 << 1)

#define	GPIO_GPE_CFG 0x1920

#define	GPE0_DWX_MASK 0xf

#define	GPE0_DW_SHIFT(x) (4*(x))

#define	SLP_S0_RES 0x193c

#define	PMC_GPP_A 0x0

#define	PMC_GPP_B 0x1

#define	PMC_GPP_C 0xD

#define	PMC_GPP_D 0x4

#define	PMC_GPP_E 0xE

#define	PMC_GPP_F 0x5

#define	PMC_GPP_G 0x2

#define	PMC_GPP_H 0x6

#define	PMC_GPD 0xA

#define	GBLRST_CAUSE0 0x1924

#define	GBLRST_CAUSE0_THERMTRIP (1 << 5)

#define	GBLRST_CAUSE1 0x1928

#define	LTR_IGN 0x1B0C

#define	IGN_GBE (1 << 3)

#define	CPPMVRIC 0x1B1C

#define	XTALSDQDIS (1 << 22)

#define	CPPMVRIC2 0x1B4C

#define	ADSPOSCDIS (1 << 22)

#define	IRQ_REG ACTL

#define	SCI_IRQ_ADJUST 0

#define	ACTL 0x1BD8

#define	PWRM_EN (1 << 8)

#define	ACPI_EN (1 << 7)

#define	SCI_IRQ_SEL (7 << 0)

#define	SCIS_IRQ9 0

#define	SCIS_IRQ10 1

#define	SCIS_IRQ11 2

#define	SCIS_IRQ20 4

#define	SCIS_IRQ21 5

#define	SCIS_IRQ22 6

#define	SCIS_IRQ23 7

Functions
void	pmc_set_afterg3 (int s5pwr)

Variables
struct device_operations	pmc_ops

Macro Definition Documentation

◆ ABASE

#define ABASE 0x20

Definition at line 12 of file pmc.h.

◆ ACPI_BASE_LOCK

#define ACPI_BASE_LOCK (1 << 17)

Definition at line 56 of file pmc.h.

◆ ACPI_EN

#define ACPI_EN (1 << 7)

Definition at line 159 of file pmc.h.

◆ ACPI_TIM_DIS

#define ACPI_TIM_DIS (1 << 1)

Definition at line 105 of file pmc.h.

◆ ACTL

#define ACTL 0x1BD8

Definition at line 157 of file pmc.h.

◆ ADSPOSCDIS

#define ADSPOSCDIS (1 << 22)

Definition at line 153 of file pmc.h.

◆ AG3_PP_EN

#define AG3_PP_EN (1 << 28)

Definition at line 18 of file pmc.h.

◆ ALLOW_ICLK_PLL_SD_INC0

#define ALLOW_ICLK_PLL_SD_INC0 (1 << 26)

Definition at line 20 of file pmc.h.

◆ ALLOW_L1LOW_BCLKREQ_ON

#define ALLOW_L1LOW_BCLKREQ_ON (1 << 13)

Definition at line 32 of file pmc.h.

◆ ALLOW_L1LOW_C0

#define ALLOW_L1LOW_C0 (1 << 19)

Definition at line 26 of file pmc.h.

◆ ALLOW_L1LOW_OPI_ON

#define ALLOW_L1LOW_OPI_ON (1 << 17)

Definition at line 28 of file pmc.h.

◆ ALLOW_OPI_PLL_SD_INC0

#define ALLOW_OPI_PLL_SD_INC0 (1 << 22)

Definition at line 23 of file pmc.h.

◆ ALLOW_SPXB_CG_INC0

#define ALLOW_SPXB_CG_INC0 (1 << 20)

Definition at line 25 of file pmc.h.

◆ BIOS_PCI_EXP_EN

#define BIOS_PCI_EXP_EN (1 << 10)

Definition at line 59 of file pmc.h.

◆ CF9_GLB_RST

#define CF9_GLB_RST (1 << 20)

Definition at line 66 of file pmc.h.

◆ CF9_LOCK

#define CF9_LOCK (1 << 31)

Definition at line 65 of file pmc.h.

◆ CPPMVRIC

#define CPPMVRIC 0x1B1C

Definition at line 149 of file pmc.h.

◆ CPPMVRIC2

#define CPPMVRIC2 0x1B4C

Definition at line 152 of file pmc.h.

◆ DC_PP_DIS

#define DC_PP_DIS (1 << 30)

Definition at line 16 of file pmc.h.

◆ DIS_SLP_X_STRCH_SUS_UP

#define DIS_SLP_X_STRCH_SUS_UP (1 << 12)

Definition at line 33 of file pmc.h.

◆ DISB

#define DISB (1 << 23)

Definition at line 22 of file pmc.h.

◆ DSX_CFG

#define DSX_CFG 0x1834

Definition at line 92 of file pmc.h.

◆ DSX_CFG_MASK

#define DSX_CFG_MASK (0x1f << 0)

Definition at line 98 of file pmc.h.

◆ DSX_DIS_AC_PRESENT_PD

#define DSX_DIS_AC_PRESENT_PD (1 << 1)

Definition at line 96 of file pmc.h.

◆ DSX_EN_LAN_WAKE_PIN

#define DSX_EN_LAN_WAKE_PIN (1 << 0)

Definition at line 97 of file pmc.h.

◆ DSX_EN_WAKE_PIN

#define DSX_EN_WAKE_PIN (1 << 2)

Definition at line 95 of file pmc.h.

◆ DSX_PP_DIS

#define DSX_PP_DIS (1 << 29)

Definition at line 17 of file pmc.h.

◆ ESPI_SMI_LOCK

#define ESPI_SMI_LOCK (1 << 8)

Definition at line 40 of file pmc.h.

◆ ETR

#define ETR 0x1048

Definition at line 64 of file pmc.h.

◆ GBL_RST_STS

#define GBL_RST_STS (1 << 24)

Definition at line 21 of file pmc.h.

◆ GBLRST_CAUSE0

#define GBLRST_CAUSE0 0x1924

Definition at line 142 of file pmc.h.

◆ GBLRST_CAUSE0_THERMTRIP

#define GBLRST_CAUSE0_THERMTRIP (1 << 5)

Definition at line 143 of file pmc.h.

◆ GBLRST_CAUSE1

#define GBLRST_CAUSE1 0x1928

Definition at line 144 of file pmc.h.

◆ GEN_PMCON_A

#define GEN_PMCON_A 0x1020

Definition at line 15 of file pmc.h.

◆ GEN_PMCON_B

#define GEN_PMCON_B 0x1024

Definition at line 54 of file pmc.h.

◆ GPE0_DW_SHIFT

#define GPE0_DW_SHIFT ( x ) (4*(x))

Definition at line 108 of file pmc.h.

◆ GPE0_DWX_MASK

#define GPE0_DWX_MASK 0xf

Definition at line 107 of file pmc.h.

◆ GPIO_GPE_CFG

#define GPIO_GPE_CFG 0x1920

Definition at line 106 of file pmc.h.

◆ HOST_RST_STS

#define HOST_RST_STS (1 << 9)

Definition at line 39 of file pmc.h.

◆ IGN_GBE

#define IGN_GBE (1 << 3)

Definition at line 147 of file pmc.h.

◆ IRQ_REG

#define IRQ_REG ACTL

Definition at line 155 of file pmc.h.

◆ LTR_IGN

#define LTR_IGN 0x1B0C

Definition at line 146 of file pmc.h.

◆ MEM_SR

#define MEM_SR (1 << 21)

Definition at line 24 of file pmc.h.

◆ MS4V

#define MS4V (1 << 18)

Definition at line 27 of file pmc.h.

◆ PCH2CPU_TPR_CFG_LOCK

#define PCH2CPU_TPR_CFG_LOCK (1 << 31)

Definition at line 101 of file pmc.h.

◆ PCH2CPU_TT_EN

#define PCH2CPU_TT_EN (1 << 26)

Definition at line 102 of file pmc.h.

◆ PCH_PWRM_ACPI_TMR_CTL

#define PCH_PWRM_ACPI_TMR_CTL 0x18FC

Definition at line 104 of file pmc.h.

◆ PER_SMI_SEL_MASK

#define PER_SMI_SEL_MASK (3 << 1)

Definition at line 47 of file pmc.h.

◆ PM_DATA_BAR_DIS

#define PM_DATA_BAR_DIS (1 << 16)

Definition at line 57 of file pmc.h.

◆ PMC_GPD

#define PMC_GPD 0xA

Definition at line 139 of file pmc.h.

◆ PMC_GPP_A

#define PMC_GPP_A 0x0

Definition at line 131 of file pmc.h.

◆ PMC_GPP_B

#define PMC_GPP_B 0x1

Definition at line 132 of file pmc.h.

◆ PMC_GPP_C

#define PMC_GPP_C 0xD

Definition at line 133 of file pmc.h.

◆ PMC_GPP_D

#define PMC_GPP_D 0x4

Definition at line 134 of file pmc.h.

◆ PMC_GPP_E

#define PMC_GPP_E 0xE

Definition at line 135 of file pmc.h.

◆ PMC_GPP_F

#define PMC_GPP_F 0x5

Definition at line 136 of file pmc.h.

◆ PMC_GPP_G

#define PMC_GPP_G 0x2

Definition at line 137 of file pmc.h.

◆ PMC_GPP_H

#define PMC_GPP_H 0x6

Definition at line 138 of file pmc.h.

◆ PME_B0_S5_DIS

#define PME_B0_S5_DIS (1 << 15)

Definition at line 30 of file pmc.h.

◆ PMSYNC_TPR_CFG

#define PMSYNC_TPR_CFG 0x18C4

Definition at line 100 of file pmc.h.

◆ PRSTS

#define PRSTS 0x1810

Definition at line 78 of file pmc.h.

◆ PWR_FLR

#define PWR_FLR (1 << 14)

Definition at line 31 of file pmc.h.

◆ PWRBTN_LVL

#define PWRBTN_LVL (1 << 9)

Definition at line 60 of file pmc.h.

◆ PWRM_EN

#define PWRM_EN (1 << 8)

Definition at line 158 of file pmc.h.

◆ PWRMBASE

#define PWRMBASE 0x10

Definition at line 11 of file pmc.h.

◆ REQ_BATLOW_DSX

#define REQ_BATLOW_DSX (1 << 3)

Definition at line 94 of file pmc.h.

◆ REQ_CNV_NOWAKE_DSX

#define REQ_CNV_NOWAKE_DSX (1 << 4)

Definition at line 93 of file pmc.h.

◆ RTC_BATTERY_DEAD

#define RTC_BATTERY_DEAD (1 << 2)

Definition at line 62 of file pmc.h.

◆ S3_PWRGATE_POL

#define S3_PWRGATE_POL 0x1828

Definition at line 80 of file pmc.h.

◆ S3AC_GATE_SUS

#define S3AC_GATE_SUS (1 << 0)

Definition at line 82 of file pmc.h.

◆ S3DC_GATE_SUS

#define S3DC_GATE_SUS (1 << 1)

Definition at line 81 of file pmc.h.

◆ S4_PWRGATE_POL

#define S4_PWRGATE_POL 0x182c

Definition at line 84 of file pmc.h.

◆ S4AC_GATE_SUS

#define S4AC_GATE_SUS (1 << 0)

Definition at line 86 of file pmc.h.

◆ S4ASE

#define S4ASE (1 << 3)

Definition at line 46 of file pmc.h.

◆ S4DC_GATE_SUS

#define S4DC_GATE_SUS (1 << 1)

Definition at line 85 of file pmc.h.

◆ S4MAW_1S

#define S4MAW_1S (1 << 4)

Definition at line 42 of file pmc.h.

◆ S4MAW_2S

#define S4MAW_2S (2 << 4)

Definition at line 43 of file pmc.h.

◆ S4MAW_3S

#define S4MAW_3S (3 << 4)

Definition at line 44 of file pmc.h.

◆ S4MAW_4S

#define S4MAW_4S (0 << 4)

Definition at line 45 of file pmc.h.

◆ S4MAW_MASK

#define S4MAW_MASK (3 << 4)

Definition at line 41 of file pmc.h.

◆ S5_PWRGATE_POL

#define S5_PWRGATE_POL 0x1830

Definition at line 88 of file pmc.h.

◆ S5AC_GATE_SUS

#define S5AC_GATE_SUS (1 << 14)

Definition at line 90 of file pmc.h.

◆ S5DC_GATE_SUS

#define S5DC_GATE_SUS (1 << 15)

Definition at line 89 of file pmc.h.

◆ SCI_IRQ_ADJUST

#define SCI_IRQ_ADJUST 0

Definition at line 156 of file pmc.h.

◆ SCI_IRQ_SEL

#define SCI_IRQ_SEL (7 << 0)

Definition at line 160 of file pmc.h.

◆ SCIS_IRQ10

#define SCIS_IRQ10 1

Definition at line 163 of file pmc.h.

◆ SCIS_IRQ11

#define SCIS_IRQ11 2

Definition at line 164 of file pmc.h.

◆ SCIS_IRQ20

#define SCIS_IRQ20 4

Definition at line 165 of file pmc.h.

◆ SCIS_IRQ21

#define SCIS_IRQ21 5

Definition at line 166 of file pmc.h.

◆ SCIS_IRQ22

#define SCIS_IRQ22 6

Definition at line 167 of file pmc.h.

◆ SCIS_IRQ23

#define SCIS_IRQ23 7

Definition at line 168 of file pmc.h.

◆ SCIS_IRQ9

#define SCIS_IRQ9 0

Definition at line 162 of file pmc.h.

◆ SLEEP_AFTER_POWER_FAIL

#define SLEEP_AFTER_POWER_FAIL (1 << 0)

Definition at line 52 of file pmc.h.

◆ SLP_S0_RES

#define SLP_S0_RES 0x193c

Definition at line 110 of file pmc.h.

◆ SLP_S3_MIN_ASST_WDTH_1MS

#define SLP_S3_MIN_ASST_WDTH_1MS (1 << 10)

Definition at line 36 of file pmc.h.

◆ SLP_S3_MIN_ASST_WDTH_2S

#define SLP_S3_MIN_ASST_WDTH_2S (3 << 10)

Definition at line 38 of file pmc.h.

◆ SLP_S3_MIN_ASST_WDTH_50MS

#define SLP_S3_MIN_ASST_WDTH_50MS (2 << 10)

Definition at line 37 of file pmc.h.

◆ SLP_S3_MIN_ASST_WDTH_60USEC

#define SLP_S3_MIN_ASST_WDTH_60USEC (0 << 10)

Definition at line 35 of file pmc.h.

◆ SLP_S3_MIN_ASST_WDTH_MASK

#define SLP_S3_MIN_ASST_WDTH_MASK (3 << 10)

Definition at line 34 of file pmc.h.

◆ SLP_STR_POL_LOCK

#define SLP_STR_POL_LOCK (1 << 18)

Definition at line 55 of file pmc.h.

◆ SMI_LOCK

#define SMI_LOCK (1 << 4)

Definition at line 61 of file pmc.h.

◆ SMI_RATE_16S

#define SMI_RATE_16S (2 << 1)

Definition at line 50 of file pmc.h.

◆ SMI_RATE_32S

#define SMI_RATE_32S (1 << 1)

Definition at line 49 of file pmc.h.

◆ SMI_RATE_64S

#define SMI_RATE_64S (0 << 1)

Definition at line 48 of file pmc.h.

◆ SMI_RATE_8S

#define SMI_RATE_8S (3 << 1)

Definition at line 51 of file pmc.h.

◆ SSMC

#define SSMC 0x1050

Definition at line 72 of file pmc.h.

◆ SSMC_SSMS

#define SSMC_SSMS (1 << 0)

Definition at line 73 of file pmc.h.

◆ SSMD

#define SSMD 0x1054

Definition at line 75 of file pmc.h.

◆ SSMD_SSD_MASK

#define SSMD_SSD_MASK (0xffff << 0)

Definition at line 76 of file pmc.h.

◆ SSML

#define SSML 0x104C

Definition at line 68 of file pmc.h.

◆ SSML_SSL_DS

#define SSML_SSL_DS (0 << 0)

Definition at line 69 of file pmc.h.

◆ SSML_SSL_EN

#define SSML_SSL_EN (1 << 0)

Definition at line 70 of file pmc.h.

◆ SUS_PWR_FLR

#define SUS_PWR_FLR (1 << 16)

Definition at line 29 of file pmc.h.

◆ SX_PP_EN

#define SX_PP_EN (1 << 27)

Definition at line 19 of file pmc.h.

◆ WOL_EN_OVRD

#define WOL_EN_OVRD (1 << 13)

Definition at line 58 of file pmc.h.

◆ XTALSDQDIS

#define XTALSDQDIS (1 << 22)

Definition at line 150 of file pmc.h.

Function Documentation

◆ pmc_set_afterg3()

void pmc_set_afterg3 ( int s5pwr )

Variable Documentation

◆ pmc_ops

struct device_operations pmc_ops

extern

Definition at line 185 of file pmc.c.

Macros

Functions

Variables