20 #include <soc/pci_devs.h>
22 #include <soc/soc_chip.h>
26 #define PMC_HID "INTC1026"
34 enable ?
"En" :
"Dis", sx +
'0');
121 if (
CONFIG(PMC_IPC_ACPI_INTERFACE))
127 if (
CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_PEP)) {
131 .lpm_ipc_offset = 0x1000,
132 .req_reg_stride = 0x30,
162 if (!
CONFIG(USE_PM_ACPI_TIMER))
195 #if CONFIG(HAVE_ACPI_TABLES)
const char * acpi_device_path(const struct device *dev)
const char * acpi_device_name(const struct device *dev)
const char * acpi_device_scope(const struct device *dev)
void acpigen_pop_len(void)
void acpigen_write_scope(const char *name)
void acpigen_write_resourcetemplate_footer(void)
void acpigen_write_resourcetemplate_header(void)
void acpigen_write_mem32fixed(int readwrite, u32 base, u32 size)
void acpigen_write_device(const char *name)
void acpigen_write_name(const char *name)
void acpigen_write_name_string(const char *name, const char *string)
uint8_t * pmc_mmio_regs(void)
static void config_deep_s5(int on_ac, int on_dc)
static void config_deep_sx(uint32_t deepsx_config)
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL)
static void pmc_final(struct device *dev)
struct device_operations pmc_ops
static void soc_pmc_enable(struct device *dev)
static void soc_pmc_read_resources(struct device *dev)
static void pm1_enable_pwrbtn_smi(void *unused)
static void soc_pmc_init(struct device *dev)
static void soc_pmc_fill_ssdt(const struct device *dev)
static void config_deep_s3(int on_ac, int on_dc)
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
static void write32(void *addr, uint32_t val)
static uint32_t read32(const void *addr)
#define printk(level,...)
struct resource * new_resource(struct device *dev, unsigned int index)
See if a resource structure already exists for a given index and if not allocate one.
const char * dev_path(const struct device *dev)
static void noop_set_resources(struct device *dev)
#define mmio_resource(dev, idx, basek, sizek)
#define setbits8(addr, set)
#define PCH_PWRM_BASE_ADDRESS
#define PCH_PWRM_BASE_SIZE
#define ACPI_BASE_ADDRESS
#define PCH_PWRM_ACPI_TMR_CTL
#define BIOS_INFO
BIOS_INFO - Expected events.
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
void generate_acpi_power_engine_with_lpm(const struct soc_pmc_lpm *lpm)
void pmc_ipc_acpi_fill_ssdt(void)
#define IORESOURCE_ASSIGNED
void scan_static_bus(struct device *bus)
uint8_t get_supported_lpm_mask(void)
void pmc_set_power_failure_state(bool target_on)
void pmc_set_acpi_mode(void)
void pmc_update_pm1_enable(uint16_t events)
void pmc_clear_pmcon_sts(void)
void(* read_resources)(struct device *dev)
struct chip_operations * chip_ops
unsigned int num_substates