coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
bootblock_common.h
>
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#include <
console/console.h
>
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#include <
delay.h
>
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#include <
gpio.h
>
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#include "
include/ec.h
"
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#include "include/gpio.h"
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#define ADC_3V_10BIT_GRANULARITY_MAX (3005 / 1023)
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#define PCB_VER_AD 1
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#define MODEL_ID_AD 3
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#define DGPU_PRESENT GPP_A20
/* Active low */
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#define DGPU_HOLD_RST GPP_B4
/* Active low */
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#define DGPU_PWR_EN GPP_B21
/* Active low */
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/* TODO/NB: Detection is still unreliable. Is a wait required? */
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static
void
board_detect
(
void
)
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{
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printk
(
BIOS_DEBUG
,
"Mainboard: Detecting board SKU\n"
);
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uint16_t
data_buffer =
read_ec_adc_converter
(
MODEL_ID_AD
);
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printk
(
BIOS_DEBUG
,
"BoardId (raw) = 0x%x\n"
, data_buffer);
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printk
(
BIOS_DEBUG
,
"BoardId: "
);
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/* Board by max millivoltage range (of 10-bit, 3.005 V ADC) */
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if
(data_buffer <= (1374 /
ADC_3V_10BIT_GRANULARITY_MAX
)) {
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printk
(
BIOS_ERR
,
"Reserved?\n"
);
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}
else
if
(data_buffer <= (2017 /
ADC_3V_10BIT_GRANULARITY_MAX
)) {
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printk
(
BIOS_DEBUG
,
"Aspire VN7-792G (Newgate-SLS_dGPU)\n"
);
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printk
(
BIOS_CRIT
,
"WARNING: This board is unsupported!\n"
);
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printk
(
BIOS_CRIT
,
"Damage may result from programming incorrect GPIO table!\n"
);
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}
else
if
(data_buffer <= (2259 /
ADC_3V_10BIT_GRANULARITY_MAX
)) {
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printk
(
BIOS_DEBUG
,
"Aspire VN7-592G (Rayleigh-SLS_960M)\n"
);
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printk
(
BIOS_CRIT
,
"WARNING: This board is unsupported!\n"
);
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printk
(
BIOS_CRIT
,
"Damage may result from programming incorrect GPIO table!\n"
);
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}
else
{
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printk
(
BIOS_DEBUG
,
"Aspire VN7-572G (Rayleigh-SL_dGPU)\n"
);
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}
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data_buffer =
read_ec_adc_converter
(
PCB_VER_AD
);
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printk
(
BIOS_DEBUG
,
"PCB version (raw) = 0x%x\n"
, data_buffer);
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printk
(
BIOS_DEBUG
,
"PCB version: "
);
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/* PCB by max millivoltage range (of 10-bit, 3.005 V ADC) */
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if
(data_buffer <= (2017 /
ADC_3V_10BIT_GRANULARITY_MAX
)) {
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printk
(
BIOS_ERR
,
"Reserved?\n"
);
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}
else
if
(data_buffer <= (2259 /
ADC_3V_10BIT_GRANULARITY_MAX
)) {
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printk
(
BIOS_DEBUG
,
"-1\n"
);
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}
else
if
(data_buffer <= (2493 /
ADC_3V_10BIT_GRANULARITY_MAX
)) {
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printk
(
BIOS_DEBUG
,
"SC\n"
);
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}
else
if
(data_buffer <= (2759 /
ADC_3V_10BIT_GRANULARITY_MAX
)) {
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printk
(
BIOS_DEBUG
,
"SB\n"
);
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}
else
{
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printk
(
BIOS_DEBUG
,
"SA\n"
);
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}
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}
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static
void
dgpu_power_on
(
void
)
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{
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if
(!
gpio_get
(
DGPU_PRESENT
)) {
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printk
(
BIOS_DEBUG
,
"dGPU present, enable power...\n"
);
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gpio_set
(
DGPU_HOLD_RST
, 0);
// Assert dGPU_HOLD_RST#
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mdelay
(2);
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gpio_set
(
DGPU_PWR_EN
, 0);
// Assert dGPU_PWR_EN#
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mdelay
(7);
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gpio_set
(
DGPU_HOLD_RST
, 1);
// Deassert dGPU_HOLD_RST#
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mdelay
(30);
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}
else
{
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printk
(
BIOS_DEBUG
,
"dGPU not present, disable power...\n"
);
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gpio_set
(
DGPU_HOLD_RST
, 0);
// Assert dGPU_HOLD_RST#
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gpio_set
(
DGPU_PWR_EN
, 1);
// Deassert dGPU_PWR_EN#
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}
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}
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void
bootblock_mainboard_init
(
void
)
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{
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/* NB: Relocated from _early_init() so that debug logging works.
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* However, if we use this to ensure that the user flashed the correct
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* (future) variant, this must occur before any GPIOs are programmed.
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*/
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board_detect
();
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dgpu_power_on
();
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}
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void
bootblock_mainboard_early_init
(
void
)
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{
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mainboard_config_stage_gpios
();
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}
bootblock_common.h
printk
#define printk(level,...)
Definition:
stdlib.h:16
console.h
delay.h
mdelay
void mdelay(unsigned int msecs)
Definition:
delay.c:2
gpio_get
int gpio_get(gpio_t gpio)
Definition:
gpio.c:166
gpio_set
void gpio_set(gpio_t gpio, int value)
Definition:
gpio.c:174
bootblock_mainboard_init
__weak void bootblock_mainboard_init(void)
Definition:
bootblock.c:19
bootblock_mainboard_early_init
__weak void bootblock_mainboard_early_init(void)
Definition:
bootblock.c:16
BIOS_DEBUG
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition:
loglevel.h:128
BIOS_CRIT
#define BIOS_CRIT
BIOS_CRIT - Recovery unlikely.
Definition:
loglevel.h:56
BIOS_ERR
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
Definition:
loglevel.h:72
dgpu_power_on
static void dgpu_power_on(void)
Definition:
bootblock.c:58
PCB_VER_AD
#define PCB_VER_AD
Definition:
bootblock.c:11
DGPU_PWR_EN
#define DGPU_PWR_EN
Definition:
bootblock.c:16
DGPU_HOLD_RST
#define DGPU_HOLD_RST
Definition:
bootblock.c:15
DGPU_PRESENT
#define DGPU_PRESENT
Definition:
bootblock.c:14
ADC_3V_10BIT_GRANULARITY_MAX
#define ADC_3V_10BIT_GRANULARITY_MAX
Definition:
bootblock.c:10
board_detect
static void board_detect(void)
Definition:
bootblock.c:19
MODEL_ID_AD
#define MODEL_ID_AD
Definition:
bootblock.c:12
read_ec_adc_converter
uint16_t read_ec_adc_converter(uint8_t adc)
Definition:
ec.c:69
mainboard_config_stage_gpios
void mainboard_config_stage_gpios(void)
Definition:
gpio.c:371
ec.h
gpio.h
uint16_t
unsigned short uint16_t
Definition:
stdint.h:11
src
mainboard
acer
aspire_vn7_572g
bootblock.c
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