coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
uart.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SOC_INTEL_COMMON_BLOCK_UART_H
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#define SOC_INTEL_COMMON_BLOCK_UART_H
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#include <
console/uart.h
>
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#include <
device/device.h
>
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#include <
stdint.h
>
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/*
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* While using this common UART block for any SOC following is expected from soc
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* 1. SOC will define proper UART_BASE which is base address for UART console.
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* 2. SOC will return correct device pointer based on console index
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* 3. SOC will allow common code to set UART into legacy mode if supported.
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*/
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/*
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* Check if UART debug controller is initialized
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* Returns:
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* true = If debug controller PCI config space is initialized and device is
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* out of reset
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* false = otherwise
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*/
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bool
uart_is_controller_initialized
(
void
);
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/*
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* Check if dev corresponds to UART debug port controller.
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*
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* Returns:
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* true: UART dev is debug port
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* false: otherwise
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*/
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bool
uart_is_debug_controller
(
struct
device
*dev);
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/*
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* BootBlock pre initialization of UART console
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*/
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void
uart_bootblock_init
(
void
);
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/*
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* Get UART debug controller device structure
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*
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* Returns:
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* Pointer to device structure = If device has a UART debug controller.
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* NULL = otherwise
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*/
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const
struct
device
*
uart_get_device
(
void
);
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#endif
/* SOC_INTEL_COMMON_BLOCK_UART_H */
uart.h
device.h
uart_get_device
const struct device * uart_get_device(void)
Definition:
uart.c:69
uart_is_controller_initialized
bool uart_is_controller_initialized(void)
Definition:
uart.c:78
uart_bootblock_init
void uart_bootblock_init(void)
Definition:
uart.c:97
uart_is_debug_controller
bool uart_is_debug_controller(struct device *dev)
stdint.h
device
Definition:
device.h:107
src
soc
intel
common
block
include
intelblocks
uart.h
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