coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
uart.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef SOC_INTEL_COMMON_BLOCK_UART_H
4 #define SOC_INTEL_COMMON_BLOCK_UART_H
5 
6 #include <console/uart.h>
7 #include <device/device.h>
8 #include <stdint.h>
9 
10 /*
11  * While using this common UART block for any SOC following is expected from soc
12  * 1. SOC will define proper UART_BASE which is base address for UART console.
13  * 2. SOC will return correct device pointer based on console index
14  * 3. SOC will allow common code to set UART into legacy mode if supported.
15  */
16 
17 /*
18  * Check if UART debug controller is initialized
19  * Returns:
20  * true = If debug controller PCI config space is initialized and device is
21  * out of reset
22  * false = otherwise
23  */
25 
26 /*
27  * Check if dev corresponds to UART debug port controller.
28  *
29  * Returns:
30  * true: UART dev is debug port
31  * false: otherwise
32  */
33 bool uart_is_debug_controller(struct device *dev);
34 
35 /*
36  * BootBlock pre initialization of UART console
37  */
38 void uart_bootblock_init(void);
39 
40 /*
41  * Get UART debug controller device structure
42  *
43  * Returns:
44  * Pointer to device structure = If device has a UART debug controller.
45  * NULL = otherwise
46  */
47 const struct device *uart_get_device(void);
48 
49 #endif /* SOC_INTEL_COMMON_BLOCK_UART_H */
const struct device * uart_get_device(void)
Definition: uart.c:69
bool uart_is_controller_initialized(void)
Definition: uart.c:78
void uart_bootblock_init(void)
Definition: uart.c:97
bool uart_is_debug_controller(struct device *dev)
Definition: device.h:107