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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Functions | |
bool | uart_is_controller_initialized (void) |
bool | uart_is_debug_controller (struct device *dev) |
void | uart_bootblock_init (void) |
const struct device * | uart_get_device (void) |
Definition at line 69 of file uart.c.
References NULL, PCI_DEV2DEVFN, PCI_DEV_INVALID, pcidev_path_on_root(), and uart_console_get_pci_bdf().
Referenced by southbridge_write_acpi_tables().
Definition at line 78 of file uart.c.
References base, lpss_is_controller_in_reset(), PCI_BASE_ADDRESS_0, PCI_COMMAND, PCI_DEV_INVALID, pci_s_read_config16(), pci_s_read_config32(), uart_console_get_pci_bdf(), and UART_PCI_ENABLE.
Referenced by smihandler_southbridge_sleep().