coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <gpio.h>
6 #include <soc/gpio.h>
8 
9 /* This table is used by dalboz variant with board version < 2. */
10 static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
11  /* DMIC_SEL */
12  PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC
13  /* USB_OC2_L - USB A0 & A1 */
14  PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
15  /* TP */
16  PAD_NC(GPIO_32),
17  /* EN_PWR_TOUCHPAD_PS2 */
18  PAD_GPO(GPIO_67, HIGH),
19  /* EN_DEV_BEEP_L */
20  PAD_GPO(GPIO_89, HIGH),
21  /* USI_RESET */
22  PAD_GPO(GPIO_140, HIGH),
23  /* Unused */
25 };
26 
27 static const struct soc_amd_gpio bid_2_gpio_set_stage_ram[] = {
28  /* DMIC_SEL */
29  PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC
30  /* TP */
31  PAD_NC(GPIO_32),
32  /* EN_PWR_TOUCHPAD_PS2 */
33  PAD_GPO(GPIO_67, HIGH),
34  /* EN_DEV_BEEP_L */
35  PAD_GPO(GPIO_89, HIGH),
36  /* USI_RESET */
37  PAD_GPO(GPIO_140, HIGH),
38 };
39 
40 const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
41 {
42  uint32_t board_version;
43 
44  /*
45  * If board version cannot be read, assume that this is an older revision of the board
46  * and so apply overrides. If board version is provided by the EC, then apply overrides
47  * if version < 2.
48  */
49  if (google_chromeec_cbi_get_board_version(&board_version) != 0)
50  board_version = 1;
51 
52  if (board_version < 2) {
55  } else if (board_version == 2) {
58  }
59 
60  *size = 0;
61  return NULL;
62 }
#define GPIO_18
Definition: gpio_ftns.h:17
#define GPIO_32
Definition: gpio_ftns.h:15
#define ARRAY_SIZE(a)
Definition: helpers.h:12
int google_chromeec_cbi_get_board_version(uint32_t *version)
Definition: ec.c:870
#define PULL_NONE
Definition: buildOpts.c:72
const struct pad_config *__weak variant_override_gpio_table(size_t *num)
Definition: gpio.c:450
static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[]
Definition: gpio.c:10
static const struct soc_amd_gpio bid_2_gpio_set_stage_ram[]
Definition: gpio.c:27
#define GPIO_143
Definition: gpio.h:90
#define GPIO_89
Definition: gpio.h:65
#define GPIO_67
Definition: gpio.h:53
#define GPIO_140
Definition: gpio.h:87
#define GPIO_6
Definition: gpio.h:27
#define PAD_NC(pin)
Definition: gpio_defs.h:263
#define PAD_GPO(pin, direction)
Definition: gpio_defs.h:220
#define PAD_NF(pin, func, pull)
Definition: gpio_defs.h:208
#define NULL
Definition: stddef.h:19
unsigned int uint32_t
Definition: stdint.h:14