coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
hdmi.h File Reference
#include <types.h>
Include dependency graph for hdmi.h:

Go to the source code of this file.

Data Structures

struct  rk3288_hdmi_regs
 

Macros

#define HDMI_EDID_BLOCK_SIZE   128
 

Enumerations

enum  {
  PHY_OPMODE_PLLCFG = 0x06 , PHY_CKCALCTRL = 0x05 , PHY_CKSYMTXCTRL = 0x09 , PHY_VLEVCTRL = 0x0e ,
  PHY_PLLCURRCTRL = 0x10 , PHY_PLLPHBYCTRL = 0x13 , PHY_PLLGMPCTRL = 0x15 , PHY_PLLCLKBISTPHASE = 0x17 ,
  PHY_TXTERM = 0x19 , HDMI_IH_PHY_STAT0_HPD = 0x1 , HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2 , HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1 ,
  HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00 , HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1f , HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0 , HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4 ,
  HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2 , HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1 , HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xf0 , HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4 ,
  HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0f , HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0 , HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20 , HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5 ,
  HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4 , HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4 , HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2 , HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2 ,
  HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1 , HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1 , HDMI_VP_CONF_BYPASS_EN_MASK = 0x40 , HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40 ,
  HDMI_VP_CONF_PP_EN_ENMASK = 0x20 , HDMI_VP_CONF_PP_EN_DISABLE = 0x00 , HDMI_VP_CONF_PR_EN_MASK = 0x10 , HDMI_VP_CONF_PR_EN_DISABLE = 0x00 ,
  HDMI_VP_CONF_YCC422_EN_MASK = 0x8 , HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0 , HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4 , HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4 ,
  HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3 , HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3 , HDMI_VP_REMAP_YCC422_16BIT = 0x0 , HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80 ,
  HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80 , HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00 , HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40 , HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40 ,
  HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00 , HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20 , HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20 , HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00 ,
  HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10 , HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10 , HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00 , HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8 ,
  HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8 , HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0 , HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2 , HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2 ,
  HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0 , HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1 , HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1 , HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0 ,
  HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03 , HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00 , HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01 , HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02 ,
  HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40 , HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40 , HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00 , HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0c ,
  HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00 , HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04 , HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08 , HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0c ,
  HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30 , HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10 , HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20 , HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00 ,
  HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0f , HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08 , HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09 , HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0a ,
  HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0b , HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30 , HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00 , HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10 ,
  HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20 , HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xc0 , HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00 , HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40 ,
  HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80 , HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xc0 , HDMI_FC_AVICONF2_SCALING_MASK = 0x03 , HDMI_FC_AVICONF2_SCALING_NONE = 0x00 ,
  HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01 , HDMI_FC_AVICONF2_SCALING_VERT = 0x02 , HDMI_FC_AVICONF2_SCALING_HORIZ_vert = 0x03 , HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0c ,
  HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00 , HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04 , HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08 , HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70 ,
  HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00 , HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10 , HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20 , HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30 ,
  HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40 , HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80 , HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00 , HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80 ,
  HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03 , HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00 , HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01 , HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02 ,
  HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03 , HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0c , HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00 , HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04 ,
  HDMI_FC_GCP_SET_AVMUTE = 0x02 , HDMI_FC_GCP_CLEAR_AVMUTE = 0x01 , HDMI_PHY_CONF0_PDZ_MASK = 0x80 , HDMI_PHY_CONF0_PDZ_OFFSET = 7 ,
  HDMI_PHY_CONF0_ENTMDS_MASK = 0x40 , HDMI_PHY_CONF0_ENTMDS_OFFSET = 6 , HDMI_PHY_CONF0_SPARECTRL_MASK = 0x20 , HDMI_PHY_CONF0_SPARECTRL_OFFSET = 5 ,
  HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10 , HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4 , HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8 , HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3 ,
  HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2 , HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1 , HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1 , HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0 ,
  HDMI_PHY_TST0_TSTCLR_MASK = 0x20 , HDMI_PHY_TST0_TSTCLR_OFFSET = 5 , HDMI_PHY_HPD = 0x02 , HDMI_PHY_TX_PHY_LOCK = 0x01 ,
  HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69 , HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10 , HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08 , HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80 ,
  HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08 , HDMI_AUD_CONF0_SW_AUDIO_FIFO_RST = 0x80 , HDMI_AUD_CONF0_I2S_SELECT = 0x20 , HDMI_AUD_CONF0_I2S_IN_EN_0 = 0x01 ,
  HDMI_AUD_CONF0_I2S_IN_EN_1 = 0x02 , HDMI_AUD_CONF0_I2S_IN_EN_2 = 0x04 , HDMI_AUD_CONF0_I2S_IN_EN_3 = 0x08 , HDMI_AUD_CONF1_I2S_MODE_STANDARD_MODE = 0x0 ,
  HDMI_AUD_CONF1_I2S_WIDTH_16BIT = 0x10 , HDMI_AUD_N3_NCTS_ATOMIC_WRITE = 0x80 , HDMI_AUD_N3_AUDN19_16_MASK = 0x0f , HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5 ,
  HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0 , HDMI_AUD_CTS3_N_SHIFT_1 = 0 , HDMI_AUD_CTS3_N_SHIFT_16 = 0x20 , HDMI_AUD_CTS3_N_SHIFT_32 = 0x40 ,
  HDMI_AUD_CTS3_N_SHIFT_64 = 0x60 , HDMI_AUD_CTS3_N_SHIFT_128 = 0x80 , HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0 , HDMI_AUD_CTS3_CTS_MANUAL = 0x10 ,
  HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f , HDMI_AUD_INPUTCLKFS_128 = 0x0 , HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8 , HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2 ,
  HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1 , HDMI_MC_SWRSTZ_II2SSWRST_REQ = 0x08 , HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02 , HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1 ,
  HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0 , HDMI_MC_PHYRSTZ_ASSERT = 0x0 , HDMI_MC_PHYRSTZ_DEASSERT = 0x1 , HDMI_MC_HEACPHY_RST_ASSERT = 0x1 ,
  HDMI_CSC_CFG_INTMODE_DISABLE = 0x00 , HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xf0 , HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00 , HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50 ,
  HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60 , HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70 , HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03 , HDMI_I2CM_SLAVE_DDC_ADDR = 0x50 ,
  HDMI_I2CM_SEGADDR_DDC = 0x30 , HDMI_I2CM_OPT_RD8_EXT = 0x8 , HDMI_I2CM_OPT_RD8 = 0x4 , HDMI_I2CM_DIV_FAST_STD_MODE = 0x8 ,
  HDMI_I2CM_DIV_FAST_MODE = 0x8 , HDMI_I2CM_DIV_STD_MODE = 0x0 , HDMI_I2CM_SOFTRSTZ = 0x1
}
 

Functions

 check_member (rk3288_hdmi_regs, i2cm_buf0, 0x1f880)
 
int rk_hdmi_init (u32 vop_id)
 
int rk_hdmi_enable (const struct edid *edid)
 
int rk_hdmi_get_edid (struct edid *edid)
 

Macro Definition Documentation

◆ HDMI_EDID_BLOCK_SIZE

#define HDMI_EDID_BLOCK_SIZE   128

Definition at line 8 of file hdmi.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
PHY_OPMODE_PLLCFG 
PHY_CKCALCTRL 
PHY_CKSYMTXCTRL 
PHY_VLEVCTRL 
PHY_PLLCURRCTRL 
PHY_PLLPHBYCTRL 
PHY_PLLGMPCTRL 
PHY_PLLCLKBISTPHASE 
PHY_TXTERM 
HDMI_IH_PHY_STAT0_HPD 
HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT 
HDMI_IH_MUTE_MUTE_ALL_INTERRUPT 
HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE 
HDMI_TX_INVID0_VIDEO_MAPPING_MASK 
HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET 
HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE 
HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE 
HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE 
HDMI_VP_PR_CD_COLOR_DEPTH_MASK 
HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET 
HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK 
HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET 
HDMI_VP_STUFF_IDEFAULT_PHASE_MASK 
HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET 
HDMI_VP_STUFF_YCC422_STUFFING_MASK 
HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE 
HDMI_VP_STUFF_PP_STUFFING_MASK 
HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE 
HDMI_VP_STUFF_PR_STUFFING_MASK 
HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE 
HDMI_VP_CONF_BYPASS_EN_MASK 
HDMI_VP_CONF_BYPASS_EN_ENABLE 
HDMI_VP_CONF_PP_EN_ENMASK 
HDMI_VP_CONF_PP_EN_DISABLE 
HDMI_VP_CONF_PR_EN_MASK 
HDMI_VP_CONF_PR_EN_DISABLE 
HDMI_VP_CONF_YCC422_EN_MASK 
HDMI_VP_CONF_YCC422_EN_DISABLE 
HDMI_VP_CONF_BYPASS_SELECT_MASK 
HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER 
HDMI_VP_CONF_OUTPUT_SELECTOR_MASK 
HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS 
HDMI_VP_REMAP_YCC422_16BIT 
HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK 
HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE 
HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE 
HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK 
HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH 
HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW 
HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK 
HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH 
HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW 
HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK 
HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH 
HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW 
HDMI_FC_INVIDCONF_DVI_MODEZ_MASK 
HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE 
HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE 
HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK 
HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH 
HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW 
HDMI_FC_INVIDCONF_IN_I_P_MASK 
HDMI_FC_INVIDCONF_IN_I_P_INTERLACED 
HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE 
HDMI_FC_AVICONF0_PIX_FMT_MASK 
HDMI_FC_AVICONF0_PIX_FMT_RGB 
HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 
HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 
HDMI_FC_AVICONF0_ACTIVE_FMT_MASK 
HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT 
HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO 
HDMI_FC_AVICONF0_BAR_DATA_MASK 
HDMI_FC_AVICONF0_BAR_DATA_NO_DATA 
HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR 
HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR 
HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR 
HDMI_FC_AVICONF0_SCAN_INFO_MASK 
HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN 
HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN 
HDMI_FC_AVICONF0_SCAN_INFO_NODATA 
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK 
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED 
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK 
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA 
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 
HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 
HDMI_FC_AVICONF1_COLORIMETRY_MASK 
HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA 
HDMI_FC_AVICONF1_COLORIMETRY_SMPTE 
HDMI_FC_AVICONF1_COLORIMETRY_ITUR 
HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO 
HDMI_FC_AVICONF2_SCALING_MASK 
HDMI_FC_AVICONF2_SCALING_NONE 
HDMI_FC_AVICONF2_SCALING_HORIZ 
HDMI_FC_AVICONF2_SCALING_VERT 
HDMI_FC_AVICONF2_SCALING_HORIZ_vert 
HDMI_FC_AVICONF2_RGB_QUANT_MASK 
HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT 
HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE 
HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE 
HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK 
HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 
HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 
HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 
HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 
HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB 
HDMI_FC_AVICONF2_IT_CONTENT_MASK 
HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA 
HDMI_FC_AVICONF2_IT_CONTENT_VALID 
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK 
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS 
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO 
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA 
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME 
HDMI_FC_AVICONF3_QUANT_RANGE_MASK 
HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED 
HDMI_FC_AVICONF3_QUANT_RANGE_FULL 
HDMI_FC_GCP_SET_AVMUTE 
HDMI_FC_GCP_CLEAR_AVMUTE 
HDMI_PHY_CONF0_PDZ_MASK 
HDMI_PHY_CONF0_PDZ_OFFSET 
HDMI_PHY_CONF0_ENTMDS_MASK 
HDMI_PHY_CONF0_ENTMDS_OFFSET 
HDMI_PHY_CONF0_SPARECTRL_MASK 
HDMI_PHY_CONF0_SPARECTRL_OFFSET 
HDMI_PHY_CONF0_GEN2_PDDQ_MASK 
HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET 
HDMI_PHY_CONF0_GEN2_TXPWRON_MASK 
HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET 
HDMI_PHY_CONF0_SELDATAENPOL_MASK 
HDMI_PHY_CONF0_SELDATAENPOL_OFFSET 
HDMI_PHY_CONF0_SELDIPIF_MASK 
HDMI_PHY_CONF0_SELDIPIF_OFFSET 
HDMI_PHY_TST0_TSTCLR_MASK 
HDMI_PHY_TST0_TSTCLR_OFFSET 
HDMI_PHY_HPD 
HDMI_PHY_TX_PHY_LOCK 
HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 
HDMI_PHY_I2CM_OPERATION_ADDR_WRITE 
HDMI_PHY_I2CM_INT_ADDR_DONE_POL 
HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL 
HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL 
HDMI_AUD_CONF0_SW_AUDIO_FIFO_RST 
HDMI_AUD_CONF0_I2S_SELECT 
HDMI_AUD_CONF0_I2S_IN_EN_0 
HDMI_AUD_CONF0_I2S_IN_EN_1 
HDMI_AUD_CONF0_I2S_IN_EN_2 
HDMI_AUD_CONF0_I2S_IN_EN_3 
HDMI_AUD_CONF1_I2S_MODE_STANDARD_MODE 
HDMI_AUD_CONF1_I2S_WIDTH_16BIT 
HDMI_AUD_N3_NCTS_ATOMIC_WRITE 
HDMI_AUD_N3_AUDN19_16_MASK 
HDMI_AUD_CTS3_N_SHIFT_OFFSET 
HDMI_AUD_CTS3_N_SHIFT_MASK 
HDMI_AUD_CTS3_N_SHIFT_1 
HDMI_AUD_CTS3_N_SHIFT_16 
HDMI_AUD_CTS3_N_SHIFT_32 
HDMI_AUD_CTS3_N_SHIFT_64 
HDMI_AUD_CTS3_N_SHIFT_128 
HDMI_AUD_CTS3_N_SHIFT_256 
HDMI_AUD_CTS3_CTS_MANUAL 
HDMI_AUD_CTS3_AUDCTS19_16_MASK 
HDMI_AUD_INPUTCLKFS_128 
HDMI_MC_CLKDIS_AUDCLK_DISABLE 
HDMI_MC_CLKDIS_TMDSCLK_DISABLE 
HDMI_MC_CLKDIS_PIXELCLK_DISABLE 
HDMI_MC_SWRSTZ_II2SSWRST_REQ 
HDMI_MC_SWRSTZ_TMDSSWRST_REQ 
HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH 
HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS 
HDMI_MC_PHYRSTZ_ASSERT 
HDMI_MC_PHYRSTZ_DEASSERT 
HDMI_MC_HEACPHY_RST_ASSERT 
HDMI_CSC_CFG_INTMODE_DISABLE 
HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK 
HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP 
HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP 
HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP 
HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP 
HDMI_CSC_SCALE_CSCSCALE_MASK 
HDMI_I2CM_SLAVE_DDC_ADDR 
HDMI_I2CM_SEGADDR_DDC 
HDMI_I2CM_OPT_RD8_EXT 
HDMI_I2CM_OPT_RD8 
HDMI_I2CM_DIV_FAST_STD_MODE 
HDMI_I2CM_DIV_FAST_MODE 
HDMI_I2CM_DIV_STD_MODE 
HDMI_I2CM_SOFTRSTZ 

Definition at line 181 of file hdmi.h.

Function Documentation

◆ check_member()

check_member ( rk3288_hdmi_regs  ,
i2cm_buf0  ,
0x1f880   
)

◆ rk_hdmi_enable()

int rk_hdmi_enable ( const struct edid edid)

Definition at line 809 of file hdmi.c.

References hdmi_setup().

Referenced by rk_display_init().

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◆ rk_hdmi_get_edid()

int rk_hdmi_get_edid ( struct edid edid)

◆ rk_hdmi_init()

int rk_hdmi_init ( u32  vop_id)

Definition at line 816 of file hdmi.c.

References hdmi_debug, hdmi_init_interrupt(), hdmi_wait_for_hpd(), rk3288_grf, RK_CLRBITS, RK_SETBITS, rk3288_grf_regs::soc_con6, val, and write32().

Referenced by rk_display_init().

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