coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
nc_fpga_early.c File Reference
#include <arch/mmio.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <types.h>
#include "nc_fpga.h"
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Functions

int pci_early_device_probe (u8 bus, u8 dev, u32 mmio_base)
 
void nc_fpga_remap (uint32_t new_mmio)
 
void nc_fpga_post (uint8_t value)
 

Variables

static DEVTREE_CONST uint32_t fpga_bar = CONFIG_EARLY_PCI_MMIO_BASE
 
static bool nc_fpga_present = false
 

Function Documentation

◆ nc_fpga_post()

void nc_fpga_post ( uint8_t  value)

Definition at line 41 of file nc_fpga_early.c.

References ENV_BOOTBLOCK, ENV_ROMSTAGE, fpga_bar, NC_FPGA_POST_OFFSET, nc_fpga_present, value, and write32().

Referenced by mainboard_post().

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◆ nc_fpga_remap()

void nc_fpga_remap ( uint32_t  new_mmio)

Definition at line 34 of file nc_fpga_early.c.

References fpga_bar.

◆ pci_early_device_probe()

int pci_early_device_probe ( u8  bus,
u8  dev,
u32  mmio_base 
)

Definition at line 15 of file nc_fpga_early.c.

References nc_fpga_present, PCI_BASE_ADDRESS_0, PCI_COMMAND, PCI_COMMAND_MEMORY, pci_dev, PCI_DEV, pci_s_read_config16(), pci_s_read_config32(), pci_s_write_config16(), pci_s_write_config32(), PCI_VENDOR_ID, and PCI_VID_SIEMENS.

Referenced by pci_s_early_mmio_window().

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Variable Documentation

◆ fpga_bar

DEVTREE_CONST uint32_t fpga_bar = CONFIG_EARLY_PCI_MMIO_BASE
static

Definition at line 12 of file nc_fpga_early.c.

Referenced by nc_fpga_post(), and nc_fpga_remap().

◆ nc_fpga_present

bool nc_fpga_present = false
static

Definition at line 13 of file nc_fpga_early.c.

Referenced by nc_fpga_post(), and pci_early_device_probe().