coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
sd.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Secure Digital (SD) card specific support code
4  * This code is controller independent
5  */
6 
8 #include <commonlib/storage.h>
9 #include <delay.h>
10 #include <endian.h>
11 
12 #include "sd_mmc.h"
13 #include "storage.h"
14 
16 {
17  struct mmc_command cmd;
18  struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
19 
21  /* Set if controller supports voltages between 2.7 and 3.6 V. */
22  cmd.cmdarg = ((ctrlr->voltages & 0xff8000) != 0) << 8 | 0xaa;
23  cmd.resp_type = CARD_RSP_R7;
24  cmd.flags = 0;
25  int err = ctrlr->send_cmd(ctrlr, &cmd, NULL);
26  if (err)
27  return err;
28 
29  if ((cmd.response[0] & 0xff) != 0xaa)
30  return CARD_UNUSABLE_ERR;
32  return 0;
33 }
34 
36 {
37  int err;
38  struct mmc_command cmd;
39  struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
40 
41  int tries = SD_MMC_IO_RETRIES;
42  while (tries--) {
43  cmd.cmdidx = MMC_CMD_APP_CMD;
44  cmd.resp_type = CARD_RSP_R1;
45  cmd.cmdarg = 0;
46  cmd.flags = 0;
47 
48  err = ctrlr->send_cmd(ctrlr, &cmd, NULL);
49  if (err)
50  return err;
51 
53  cmd.resp_type = CARD_RSP_R3;
54 
55  /*
56  * Most cards do not answer if some reserved bits
57  * in the ocr are set. However, Some controller
58  * can set bit 7 (reserved for low voltages), but
59  * how to manage low voltages SD card is not yet
60  * specified.
61  */
62  cmd.cmdarg = (ctrlr->voltages & 0xff8000);
63 
64  if (media->version == SD_VERSION_2)
65  cmd.cmdarg |= OCR_HCS;
66 
67  err = ctrlr->send_cmd(ctrlr, &cmd, NULL);
68  if (err)
69  return err;
70 
71  // OCR_BUSY means "initialization complete".
72  if (cmd.response[0] & OCR_BUSY)
73  break;
74 
75  udelay(100);
76  }
77  if (tries < 0)
78  return CARD_UNUSABLE_ERR;
79 
80  if (media->version != SD_VERSION_2)
82 
83  media->ocr = cmd.response[0];
85  media->rca = 0;
86  return 0;
87 }
88 
89 static int sd_switch(struct sd_mmc_ctrlr *ctrlr, int mode, int group,
90  uint8_t value, uint8_t *resp)
91 {
92  /* Switch the frequency */
93  struct mmc_command cmd;
95  cmd.resp_type = CARD_RSP_R1;
96  cmd.cmdarg = (mode << 31) | (0xffffff & ~(0xf << (group * 4))) |
97  (value << (group * 4));
98  cmd.flags = 0;
99 
100  struct mmc_data data;
101  data.dest = (char *)resp;
102  data.blocksize = 64;
103  data.blocks = 1;
104  data.flags = DATA_FLAG_READ;
105 
106  return ctrlr->send_cmd(ctrlr, &cmd, &data);
107 }
108 
110 {
111  uint32_t clock = 1;
112 
113  if (media->caps & DRVR_CAP_HS)
114  clock = CLOCK_50MHZ;
115  else
116  clock = CLOCK_25MHZ;
117  SET_CLOCK(media->ctrlr, clock);
118 }
119 
121 {
122  int delay;
123  int err, timeout;
124  struct mmc_command cmd;
125  struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
126  struct mmc_data data;
128  ALLOC_CACHE_ALIGN_BUFFER(uint32_t, switch_status, 16);
129 
130  media->caps = 0;
131 
132  /* Read the SCR to find out if this card supports higher speeds */
133  cmd.cmdidx = MMC_CMD_APP_CMD;
134  cmd.resp_type = CARD_RSP_R1;
135  cmd.cmdarg = media->rca << 16;
136  cmd.flags = 0;
137 
138  err = ctrlr->send_cmd(ctrlr, &cmd, NULL);
139  if (err)
140  return err;
141 
143  cmd.resp_type = CARD_RSP_R1;
144  cmd.cmdarg = 0;
145  cmd.flags = 0;
146 
147  timeout = 3;
148  while (timeout--) {
149  data.dest = (char *)scr;
150  data.blocksize = 8;
151  data.blocks = 1;
152  data.flags = DATA_FLAG_READ;
153  err = ctrlr->send_cmd(ctrlr, &cmd, &data);
154  if (!err)
155  break;
156  }
157  if (err) {
158  sd_mmc_error("%s returning %d\n", __func__, err);
159  return err;
160  }
161 
162  media->scr[0] = be32toh(scr[0]);
163  media->scr[1] = be32toh(scr[1]);
164 
165  switch ((media->scr[0] >> 24) & 0xf) {
166  case 0:
168  break;
169  case 1:
171  break;
172  case 2:
174  break;
175  default:
177  break;
178  }
179 
180  if (media->scr[0] & SD_DATA_4BIT)
182 
183  /* Version 1.0 doesn't support switching */
184  if (media->version == SD_VERSION_1_0)
185  goto out;
186 
187  timeout = 4;
188  while (timeout--) {
189  err = sd_switch(ctrlr, SD_SWITCH_CHECK, 0, 1,
190  (uint8_t *)switch_status);
191  if (err)
192  return err;
193 
194  /* The high-speed function is busy. Try again */
195  if (!(ntohl(switch_status[7]) & SD_HIGHSPEED_BUSY))
196  break;
197  }
198 
199  /* If high-speed isn't supported, we return */
200  if (!(ntohl(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
201  goto out;
202 
203  /*
204  * If the controller doesn't support SD_HIGHSPEED, do not switch the
205  * card to HIGHSPEED mode even if the card support SD_HIGHSPPED.
206  * This can avoid a further problem when the card runs in different
207  * mode than the controller.
208  */
209  if (!((ctrlr->caps & DRVR_CAP_HS52) && (ctrlr->caps & DRVR_CAP_HS)))
210  goto out;
211 
212  /* Give the card time to recover after the switch operation. Wait for
213  * 9 (>= 8) clock cycles receiving the switch status.
214  */
215  delay = (9000000 + ctrlr->bus_hz - 1) / ctrlr->bus_hz;
216  udelay(delay);
217 
218  /* Switch to high speed */
219  err = sd_switch(ctrlr, SD_SWITCH_SWITCH, 0, 1,
220  (uint8_t *)switch_status);
221  if (err)
222  return err;
223 
224  /* Give the card time to perform the switch operation. Wait for 9
225  * (>= 8) clock cycles receiving the switch status.
226  */
227  udelay(delay);
228 
229  if ((ntohl(switch_status[4]) & 0x0f000000) == 0x01000000) {
230  media->caps |= DRVR_CAP_HS;
232  }
233 
234 out:
236  return 0;
237 }
238 
240 {
241  int err;
242  struct mmc_command cmd;
243  struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
244 
245  if (media->caps & DRVR_CAP_4BIT) {
246  cmd.cmdidx = MMC_CMD_APP_CMD;
247  cmd.resp_type = CARD_RSP_R1;
248  cmd.cmdarg = media->rca << 16;
249  cmd.flags = 0;
250 
251  err = ctrlr->send_cmd(ctrlr, &cmd, NULL);
252  if (err)
253  return err;
254 
256  cmd.resp_type = CARD_RSP_R1;
257  cmd.cmdarg = 2;
258  cmd.flags = 0;
259  err = ctrlr->send_cmd(ctrlr, &cmd, NULL);
260  if (err)
261  return err;
262 
263  SET_BUS_WIDTH(ctrlr, 4);
264  }
265  return 0;
266 }
267 
269  unsigned int partition_number)
270 {
271  /* Validate the partition number */
272  if (partition_number)
273  return -1;
274 
275  /* Update the partition number */
276  media->partition_config = partition_number;
277  return 0;
278 }
279 
281  unsigned int partition_number)
282 {
283  return "";
284 }
pte_t value
Definition: mmu.c:91
#define ALLOC_CACHE_ALIGN_BUFFER(type, name, size)
Definition: bouncebuf.h:76
static int sd_switch(struct sd_mmc_ctrlr *ctrlr, int mode, int group, uint8_t value, uint8_t *resp)
Definition: sd.c:89
int sd_set_bus_width(struct storage_media *media)
Definition: sd.c:239
const char * sd_partition_name(struct storage_media *media, unsigned int partition_number)
Definition: sd.c:280
static void sd_recalculate_clock(struct storage_media *media)
Definition: sd.c:109
int sd_change_freq(struct storage_media *media)
Definition: sd.c:120
int sd_send_if_cond(struct storage_media *media)
Definition: sd.c:15
int sd_set_partition(struct storage_media *media, unsigned int partition_number)
Definition: sd.c:268
int sd_send_op_cond(struct storage_media *media)
Definition: sd.c:35
void delay(unsigned int secs)
Definition: delay.c:8
#define SD_VERSION_1_0
Definition: storage.h:79
#define SD_VERSION_1_10
Definition: storage.h:80
#define OCR_BUSY
Definition: storage.h:100
#define OCR_HCS
Definition: storage.h:101
#define SD_VERSION_2
Definition: storage.h:78
static uint32_t be32toh(uint32_t big_endian_32bits)
Definition: endian.h:130
#define ntohl(x)
Definition: endian.h:42
static struct storage_media media
Definition: sd_media.c:21
#define SET_TIMING(ctrlr, timing_value)
Definition: sd_mmc.h:27
#define SET_BUS_WIDTH(ctrlr, width)
Definition: sd_mmc.h:15
#define SD_MMC_IO_RETRIES
Definition: sd_mmc.h:11
#define sd_mmc_error(format...)
Definition: sd_mmc.h:87
#define SET_CLOCK(ctrlr, clock_hz)
Definition: sd_mmc.h:21
#define CLOCK_25MHZ
Definition: sd_mmc_ctrlr.h:160
#define DRVR_CAP_4BIT
Definition: sd_mmc_ctrlr.h:172
#define SD_CMD_SEND_IF_COND
Definition: sd_mmc_ctrlr.h:58
#define DATA_FLAG_READ
Definition: sd_mmc_ctrlr.h:113
#define CARD_RSP_R1
Definition: sd_mmc_ctrlr.h:76
#define DRVR_CAP_HS52
Definition: sd_mmc_ctrlr.h:177
#define SD_HIGHSPEED_BUSY
Definition: sd_mmc_ctrlr.h:103
#define SD_CMD_APP_SEND_OP_COND
Definition: sd_mmc_ctrlr.h:64
#define CARD_RSP_R3
Definition: sd_mmc_ctrlr.h:80
#define SD_DATA_4BIT
Definition: sd_mmc_ctrlr.h:100
#define CARD_UNUSABLE_ERR
Definition: sd_mmc_ctrlr.h:11
#define SD_CMD_APP_SET_BUS_WIDTH
Definition: sd_mmc_ctrlr.h:63
#define CLOCK_50MHZ
Definition: sd_mmc_ctrlr.h:162
#define SD_CMD_APP_SEND_SCR
Definition: sd_mmc_ctrlr.h:65
#define SD_SWITCH_CHECK
Definition: sd_mmc_ctrlr.h:97
#define DRVR_CAP_HS
Definition: sd_mmc_ctrlr.h:176
#define SD_SWITCH_SWITCH
Definition: sd_mmc_ctrlr.h:98
#define MMC_CMD_APP_CMD
Definition: sd_mmc_ctrlr.h:42
#define BUS_TIMING_SD_HS
Definition: sd_mmc_ctrlr.h:190
#define SD_HIGHSPEED_SUPPORTED
Definition: sd_mmc_ctrlr.h:104
#define SD_CMD_SWITCH_FUNC
Definition: sd_mmc_ctrlr.h:57
#define CARD_RSP_R7
Definition: sd_mmc_ctrlr.h:84
#define NULL
Definition: stddef.h:19
unsigned int uint32_t
Definition: stdint.h:14
unsigned char uint8_t
Definition: stdint.h:8
uint32_t response[4]
Definition: sd_mmc_ctrlr.h:91
uint32_t cmdarg
Definition: sd_mmc_ctrlr.h:86
uint16_t cmdidx
Definition: sd_mmc_ctrlr.h:25
uint32_t flags
Definition: sd_mmc_ctrlr.h:92
uint32_t resp_type
Definition: sd_mmc_ctrlr.h:67
char * dest
Definition: sd_mmc_ctrlr.h:108
uint32_t blocksize
Definition: sd_mmc_ctrlr.h:117
uint32_t flags
Definition: sd_mmc_ctrlr.h:111
uint32_t blocks
Definition: sd_mmc_ctrlr.h:116
uint32_t voltages
Definition: sd_mmc_ctrlr.h:129
uint32_t bus_hz
Definition: sd_mmc_ctrlr.h:155
uint32_t caps
Definition: sd_mmc_ctrlr.h:167
int(* send_cmd)(struct sd_mmc_ctrlr *ctrlr, struct mmc_command *cmd, struct mmc_data *data)
Definition: sd_mmc_ctrlr.h:121
uint32_t ocr
Definition: storage.h:98
uint8_t partition_config
Definition: storage.h:112
uint32_t version
Definition: storage.h:75
struct sd_mmc_ctrlr * ctrlr
Definition: storage.h:63
int high_capacity
Definition: storage.h:91
uint16_t rca
Definition: storage.h:110
uint32_t caps
Definition: storage.h:74
uint32_t scr[2]
Definition: storage.h:107
void udelay(uint32_t us)
Definition: udelay.c:15