coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 
6 /* Pad configuration in ramstage */
7 static const struct pad_config override_gpio_table[] = {
8  /* C18 : AP_I2C_EMR_SDA */
10  /* C19 : AP_I2C_EMR_SCL */
12  /* D12 : WCAM_RST_L */
14  /* D13 : EN_PP2800_CAMERA */
16  /* D14 : EN_PP1200_CAMERA */
18  /* D15 : UCAM_RST_L */
20  /* E0 : CLK_24M_UCAM */
21  PAD_NC(GPP_E0, NONE),
22  /* E2 : CLK_24M_WCAM */
23  PAD_NC(GPP_E2, NONE),
24  /* H6 : AP_I2C_CAM_SDA */
25  PAD_NC(GPP_H6, NONE),
26  /* H7 : AP_I2C_CAM_SCL */
27  PAD_NC(GPP_H7, NONE),
28  /* S2 : DMIC1_CLK */
29  PAD_NC(GPP_S2, NONE),
30  /* S3 : DMIC1_DATA */
31  PAD_NC(GPP_S3, NONE),
32 };
33 
34 const struct pad_config *variant_override_gpio_table(size_t *num)
35 {
37  return override_gpio_table;
38 }
#define GPP_E0
#define GPP_D14
#define GPP_D12
#define GPP_H6
#define GPP_H7
#define GPP_C18
#define GPP_S3
#define GPP_E2
#define GPP_D13
#define GPP_C19
#define GPP_S2
#define GPP_D15
#define ARRAY_SIZE(a)
Definition: helpers.h:12
const struct pad_config *__weak variant_override_gpio_table(size_t *num)
Definition: gpio.c:450
static const struct pad_config override_gpio_table[]
Definition: gpio.c:7
#define PAD_NC(pin)
Definition: gpio_defs.h:263