coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
fsps_baseboard_dalboz.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <platform_descriptors.h>
6 
7 void __weak variant_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs,
8  size_t *dxio_num,
9  const fsp_ddi_descriptor **ddi_descs,
10  size_t *ddi_num)
11 {
12  *dxio_descs = baseboard_get_dxio_descriptors(dxio_num);
13  *ddi_descs = baseboard_get_ddi_descriptors(ddi_num);
14 }
15 
16 static const fsp_dxio_descriptor dxio_descriptors[] = {
17  {
18  // NVME SSD
19  .port_present = true,
20  .engine_type = PCIE_ENGINE,
21  .start_logical_lane = 4,
22  .end_logical_lane = 5,
23  .device_number = 1,
24  .function_number = 7,
25  .link_aspm = ASPM_L1,
26  .link_aspm_L1_1 = true,
27  .link_aspm_L1_2 = true,
28  .turn_off_unused_lanes = true,
29  .clk_req = CLK_REQ2,
30  },
31  {
32  // WLAN
33  .port_present = true,
34  .engine_type = PCIE_ENGINE,
35  .start_logical_lane = 0,
36  .end_logical_lane = 0,
37  .device_number = 1,
38  .function_number = 2,
39  .link_aspm = ASPM_L1,
40  .link_aspm_L1_1 = true,
41  .link_aspm_L1_2 = true,
42  .turn_off_unused_lanes = true,
43  .clk_req = CLK_REQ0,
44  },
45  {
46  // SD Reader
47  .port_present = true,
48  .engine_type = PCIE_ENGINE,
49  .start_logical_lane = 1,
50  .end_logical_lane = 1,
51  .device_number = 1,
52  .function_number = 3,
53  .link_aspm = ASPM_L1,
54  .link_aspm_L1_1 = true,
55  .link_aspm_L1_2 = true,
56  .turn_off_unused_lanes = true,
57  .clk_req = CLK_REQ1,
58  }
59 };
60 
61 const fsp_dxio_descriptor *baseboard_get_dxio_descriptors(size_t *num)
62 {
64  return dxio_descriptors;
65 }
66 
67 const fsp_ddi_descriptor *baseboard_get_ddi_descriptors(size_t *num)
68 {
69  /* Different configurations of dalboz have different ddi configurations.
70  * Therefore, don't provide any baseboard defaults. */
71  *num = 0;
72  return NULL;
73 }
#define ARRAY_SIZE(a)
Definition: helpers.h:12
const fsp_ddi_descriptor * baseboard_get_ddi_descriptors(size_t *num)
void __weak variant_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num)
static const fsp_dxio_descriptor dxio_descriptors[]
const fsp_dxio_descriptor * baseboard_get_dxio_descriptors(size_t *num)
@ ASPM_L1
Definition: pcie_rp.h:50
const struct smm_save_state_ops *legacy_ops __weak
Definition: save_state.c:8
#define NULL
Definition: stddef.h:19