coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
fixme.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <arch/hpet.h>
4 #include <cpu/x86/mtrr.h>
5 #include <cpu/amd/msr.h>
6 #include <cpu/amd/mtrr.h>
8 #include <AGESA.h>
9 #include <amdlib.h>
10 
11 void amd_initcpuio(void)
12 {
13  UINT64 MsrReg;
14  UINT32 PciData;
15  PCI_ADDR PciAddress;
16  AMD_CONFIG_PARAMS StdHeader;
17 
18  /* Enable legacy video routing: D18F1xF4 VGA Enable */
19  PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0xF4);
20  PciData = 1;
21  LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
22 
23  /* The platform BIOS needs to ensure the memory ranges of Hudson legacy
24  * devices (TPM, HPET, BIOS RAM, Watchdog Timer, I/O APIC and ACPI) are
25  * set to non-posted regions.
26  */
27  PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0x84);
28  PciData = 0x00FEDF00; /* last address before processor local APIC at FEE00000 */
29  PciData |= 1 << 7; /* set NP (non-posted) bit */
30  LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
31  PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0x80);
32  PciData = (HPET_BASE_ADDRESS >> 8) | 3; /* lowest NP address is HPET at FED00000 */
33  LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
34 
35  /* Map the remaining PCI hole as posted MMIO */
36  PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0x8C);
37  PciData = 0x00FECF00; /* last address before non-posted range */
38  LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
39  LibAmdMsrRead(TOP_MEM, &MsrReg, &StdHeader);
40  MsrReg = (MsrReg >> 8) | 3;
41  PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0x88);
42  PciData = (UINT32)MsrReg;
43  LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
44 
45  /* Send all IO (0000-FFFF) to southbridge. */
46  PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0xC4);
47  PciData = 0x0000F000;
48  LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
49  PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0xC0);
50  PciData = 0x00000003;
51  LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
52 }
@ AccessWidth32
Access width is 32 bits.
Definition: Amd.h:62
void amd_initcpuio(void)
Definition: fixme.c:11
#define TOP_MEM
Definition: mtrr.h:34
#define HPET_BASE_ADDRESS
Definition: hpet.h:6
The standard header for all AGESA services.
Definition: Amd.h:74