#include <cpu/x86/msr.h>

Include dependency graph for msr.h:

This graph shows which files directly or indirectly include this file:

Macros
#define	MC4_MISC0 0x00000413

#define	MC4_MISC1 0xC0000408

#define	MC4_MISC2 0xC0000409

#define	FS_Base 0xC0000100

#define	HWCR_MSR 0xC0010015

#define	SMM_LOCK (1 << 0)

#define	NB_CFG_MSR 0xC001001f

#define	FidVidStatus 0xC0010042

#define	MC0_CTL_MASK 0xC0010044

#define	MC_CTL_MASK(bank) (MC0_CTL_MASK + (bank))

#define	MSR_INTPEND 0xC0010055

#define	MMIO_CONF_BASE 0xC0010058

#define	MMIO_RANGE_EN (1 << 0)

#define	MMIO_BUS_RANGE_SHIFT 2

#define	PS_LIM_REG 0xC0010061

#define	PS_MAX_VAL_SHFT 4

#define	PS_LIM_MAX_VAL_MASK (0x7 << PS_MAX_VAL_SHFT)

#define	MAX_PSTATES 8

#define	PS_CTL_REG 0xC0010062

#define	PS_CMD_MASK_OFF ~(7)

#define	PS_STS_MASK 7

#define	PS_STS_REG 0xC0010063

#define	PSTATE_0_MSR 0xC0010064

#define	PSTATE_1_MSR 0xC0010065

#define	PSTATE_2_MSR 0xC0010066

#define	PSTATE_3_MSR 0xC0010067

#define	PSTATE_4_MSR 0xC0010068

#define	SERIAL_VID_DECODE_MICROVOLTS 6250

#define	SERIAL_VID_MAX_MICROVOLTS 1550000L

#define	MSR_PATCH_LOADER 0xC0010020

#define	MSR_COFVID_STS 0xC0010071

#define	MSR_CSTATE_ADDRESS 0xC0010073

#define	MSR_CSTATE_ADDRESS_MASK 0xFFFF

#define	OSVW_ID_Length 0xC0010140

#define	OSVW_Status 0xC0010141

#define	SMM_BASE_MSR 0xC0010111

#define	SMM_ADDR_MSR 0xC0010112

#define	SMM_MASK_MSR 0xC0010113

#define	SMM_TSEG_VALID (1 << 1)

#define	SMM_TSEG_WB (6 << 12)

#define	CPU_ID_FEATURES_MSR 0xC0011004

#define	CPU_ID_EXT_FEATURES_MSR 0xC0011005

#define	CPU_ID_HYPER_EXT_FEATURES 0xC001100d

#define	LOGICAL_CPUS_NUM_MSR 0xC001100d

#define	LS_CFG_MSR 0xC0011020

#define	IC_CFG_MSR 0xC0011021

#define	DC_CFG_MSR 0xC0011022

#define	BU_CFG_MSR 0xC0011023

#define	FP_CFG_MSR 0xC0011028

#define	DE_CFG_MSR 0xC0011029

#define	BU_CFG2_MSR 0xC001102A

#define	BU_CFG3_MSR 0xC001102B

#define	EX_CFG_MSR 0xC001102C

#define	LS_CFG2_MSR 0xC001102D

#define	IBS_OP_DATA3_MSR 0xC0011037

#define	S3_RESUME_EIP_MSR 0xC00110E0

#define	PSP_ADDR_MSR 0xc00110a2

#define	CORE_PERF_BOOST_CTRL 0x15c

Macro Definition Documentation

◆ BU_CFG2_MSR

#define BU_CFG2_MSR 0xC001102A

Definition at line 75 of file msr.h.

◆ BU_CFG3_MSR

#define BU_CFG3_MSR 0xC001102B

Definition at line 76 of file msr.h.

◆ BU_CFG_MSR

#define BU_CFG_MSR 0xC0011023

Definition at line 72 of file msr.h.

◆ CORE_PERF_BOOST_CTRL

#define CORE_PERF_BOOST_CTRL 0x15c

Definition at line 83 of file msr.h.

◆ CPU_ID_EXT_FEATURES_MSR

#define CPU_ID_EXT_FEATURES_MSR 0xC0011005

Definition at line 66 of file msr.h.

◆ CPU_ID_FEATURES_MSR

#define CPU_ID_FEATURES_MSR 0xC0011004

Definition at line 65 of file msr.h.

◆ CPU_ID_HYPER_EXT_FEATURES

#define CPU_ID_HYPER_EXT_FEATURES 0xC001100d

Definition at line 67 of file msr.h.

◆ DC_CFG_MSR

#define DC_CFG_MSR 0xC0011022

Definition at line 71 of file msr.h.

◆ DE_CFG_MSR

#define DE_CFG_MSR 0xC0011029

Definition at line 74 of file msr.h.

◆ EX_CFG_MSR

#define EX_CFG_MSR 0xC001102C

Definition at line 77 of file msr.h.

◆ FidVidStatus

#define FidVidStatus 0xC0010042

Definition at line 20 of file msr.h.

◆ FP_CFG_MSR

#define FP_CFG_MSR 0xC0011028

Definition at line 73 of file msr.h.

◆ FS_Base

#define FS_Base 0xC0000100

Definition at line 16 of file msr.h.

◆ HWCR_MSR

#define HWCR_MSR 0xC0010015

Definition at line 17 of file msr.h.

◆ IBS_OP_DATA3_MSR

#define IBS_OP_DATA3_MSR 0xC0011037

Definition at line 79 of file msr.h.

◆ IC_CFG_MSR

#define IC_CFG_MSR 0xC0011021

Definition at line 70 of file msr.h.

◆ LOGICAL_CPUS_NUM_MSR

#define LOGICAL_CPUS_NUM_MSR 0xC001100d

Definition at line 68 of file msr.h.

◆ LS_CFG2_MSR

#define LS_CFG2_MSR 0xC001102D

Definition at line 78 of file msr.h.

◆ LS_CFG_MSR

#define LS_CFG_MSR 0xC0011020

Definition at line 69 of file msr.h.

◆ MAX_PSTATES

#define MAX_PSTATES 8

Definition at line 32 of file msr.h.

◆ MC0_CTL_MASK

#define MC0_CTL_MASK 0xC0010044

Definition at line 21 of file msr.h.

◆ MC4_MISC0

#define MC4_MISC0 0x00000413

Definition at line 13 of file msr.h.

◆ MC4_MISC1

#define MC4_MISC1 0xC0000408

Definition at line 14 of file msr.h.

◆ MC4_MISC2

#define MC4_MISC2 0xC0000409

Definition at line 15 of file msr.h.

◆ MC_CTL_MASK

#define MC_CTL_MASK ( bank ) (MC0_CTL_MASK + (bank))

Definition at line 22 of file msr.h.

◆ MMIO_BUS_RANGE_SHIFT

#define MMIO_BUS_RANGE_SHIFT 2

Definition at line 26 of file msr.h.

◆ MMIO_CONF_BASE

#define MMIO_CONF_BASE 0xC0010058

Definition at line 24 of file msr.h.

◆ MMIO_RANGE_EN

#define MMIO_RANGE_EN (1 << 0)

Definition at line 25 of file msr.h.

◆ MSR_COFVID_STS

#define MSR_COFVID_STS 0xC0010071

Definition at line 52 of file msr.h.

◆ MSR_CSTATE_ADDRESS

#define MSR_CSTATE_ADDRESS 0xC0010073

Definition at line 53 of file msr.h.

◆ MSR_CSTATE_ADDRESS_MASK

#define MSR_CSTATE_ADDRESS_MASK 0xFFFF

Definition at line 54 of file msr.h.

◆ MSR_INTPEND

#define MSR_INTPEND 0xC0010055

Definition at line 23 of file msr.h.

◆ MSR_PATCH_LOADER

#define MSR_PATCH_LOADER 0xC0010020

Definition at line 50 of file msr.h.

◆ NB_CFG_MSR

#define NB_CFG_MSR 0xC001001f

Definition at line 19 of file msr.h.

◆ OSVW_ID_Length

#define OSVW_ID_Length 0xC0010140

Definition at line 56 of file msr.h.

◆ OSVW_Status

#define OSVW_Status 0xC0010141

Definition at line 57 of file msr.h.

◆ PS_CMD_MASK_OFF

#define PS_CMD_MASK_OFF ~(7)

Definition at line 37 of file msr.h.

◆ PS_CTL_REG

#define PS_CTL_REG 0xC0010062

Definition at line 35 of file msr.h.

◆ PS_LIM_MAX_VAL_MASK

#define PS_LIM_MAX_VAL_MASK (0x7 << PS_MAX_VAL_SHFT)

Definition at line 31 of file msr.h.

◆ PS_LIM_REG

#define PS_LIM_REG 0xC0010061

Definition at line 28 of file msr.h.

◆ PS_MAX_VAL_SHFT

#define PS_MAX_VAL_SHFT 4

Definition at line 30 of file msr.h.

◆ PS_STS_MASK

#define PS_STS_MASK 7

Definition at line 39 of file msr.h.

◆ PS_STS_REG

#define PS_STS_REG 0xC0010063

Definition at line 41 of file msr.h.

◆ PSP_ADDR_MSR

#define PSP_ADDR_MSR 0xc00110a2

Definition at line 81 of file msr.h.

◆ PSTATE_0_MSR

#define PSTATE_0_MSR 0xC0010064

Definition at line 42 of file msr.h.

◆ PSTATE_1_MSR

#define PSTATE_1_MSR 0xC0010065

Definition at line 43 of file msr.h.

◆ PSTATE_2_MSR

#define PSTATE_2_MSR 0xC0010066

Definition at line 44 of file msr.h.

◆ PSTATE_3_MSR

#define PSTATE_3_MSR 0xC0010067

Definition at line 45 of file msr.h.

◆ PSTATE_4_MSR

#define PSTATE_4_MSR 0xC0010068

Definition at line 46 of file msr.h.

◆ S3_RESUME_EIP_MSR

#define S3_RESUME_EIP_MSR 0xC00110E0

Definition at line 80 of file msr.h.

◆ SERIAL_VID_DECODE_MICROVOLTS

#define SERIAL_VID_DECODE_MICROVOLTS 6250

Definition at line 48 of file msr.h.

◆ SERIAL_VID_MAX_MICROVOLTS

#define SERIAL_VID_MAX_MICROVOLTS 1550000L

Definition at line 49 of file msr.h.

◆ SMM_ADDR_MSR

#define SMM_ADDR_MSR 0xC0010112

Definition at line 60 of file msr.h.

◆ SMM_BASE_MSR

#define SMM_BASE_MSR 0xC0010111

Definition at line 59 of file msr.h.

◆ SMM_LOCK

#define SMM_LOCK (1 << 0)

Definition at line 18 of file msr.h.

◆ SMM_MASK_MSR

#define SMM_MASK_MSR 0xC0010113

Definition at line 61 of file msr.h.

◆ SMM_TSEG_VALID

#define SMM_TSEG_VALID (1 << 1)

Definition at line 62 of file msr.h.

◆ SMM_TSEG_WB

#define SMM_TSEG_WB (6 << 12)

Definition at line 63 of file msr.h.

Macros