coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
pei_data.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <stdint.h>
4 #include <string.h>
5 #include <soc/pei_data.h>
6 #include <soc/pei_wrapper.h>
7 
9 {
10  /* DQ byte map for Samus board */
11  const u8 dq_map[2][6][2] = {
12  { { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 },
13  { 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } },
14  { { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 },
15  { 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } } };
16  /* DQS CPU<>DRAM map for Samus board */
17  const u8 dqs_map[2][8] = {
18  { 2, 0, 1, 3, 6, 4, 7, 5 },
19  { 2, 1, 0, 3, 6, 5, 4, 7 } };
20 
21  pei_data->ec_present = 1;
22 
23  /* One installed DIMM per channel */
26 
27  memcpy(pei_data->dq_map, dq_map, sizeof(dq_map));
29 
30  /* P0: HOST PORT */
32  /* P1: HOST PORT */
34  /* P2: RAIDEN */
36  /* P3: SD CARD */
38  /* P4: RAIDEN */
40  /* P5: WWAN (Disabled) */
42  /* P6: CAMERA */
44  /* P7: BT */
46 
47  /* P1: HOST PORT */
48  pei_data_usb3_port(pei_data, 0, 1, 0, 0);
49  /* P2: HOST PORT */
50  pei_data_usb3_port(pei_data, 1, 1, 1, 0);
51  /* P3: RAIDEN */
53  /* P4: RAIDEN */
55 }
void * memcpy(void *dest, const void *src, size_t n)
Definition: memcpy.c:7
static void pei_data_usb2_port(struct pei_data *pei_data, int port, uint16_t length, uint8_t enable, uint8_t oc_pin, uint8_t location)
Definition: pei_wrapper.h:10
static void pei_data_usb3_port(struct pei_data *pei_data, int port, uint8_t enable, uint8_t oc_pin, uint8_t fixed_eq)
Definition: pei_wrapper.h:20
void mainboard_fill_pei_data(struct pei_data *pei_data)
Definition: pei_data.c:6
static const u8 dqs_map[][8]
Definition: memory.c:17
static const u8 dq_map[][12]
Definition: memory.c:9
#define USB_OC_PIN_SKIP
Definition: pei_data.h:27
@ USB_PORT_BACK_PANEL
Definition: pei_data.h:30
@ USB_PORT_SKIP
Definition: pei_data.h:36
@ USB_PORT_INTERNAL
Definition: pei_data.h:35
uint8_t u8
Definition: stdint.h:45
int dimm_channel0_disabled
Definition: pei_data.h:68
uint8_t dq_map[2][6][2]
Definition: pei_data.h:228
int dimm_channel1_disabled
Definition: pei_data.h:69
int ec_present
Definition: pei_data.h:62
uint8_t dqs_map[2][8]
Definition: pei_data.h:234