coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
rx6110sa.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <acpi/acpi_device.h>
4 #include <acpi/acpigen.h>
5 #include <commonlib/bsd/bcd.h>
6 #include <console/console.h>
7 #include <device/device.h>
8 #include <device/i2c.h>
9 #include <device/i2c_bus.h>
10 #include <timer.h>
11 #include <version.h>
12 #include "chip.h"
13 #include "rx6110sa.h"
14 
15 /* Function to write a register in the RTC with the given value. */
16 static void rx6110sa_write(struct device *dev, uint8_t reg, uint8_t val)
17 {
18  i2c_dev_writeb_at(dev, reg, val);
19 }
20 
21 /* Function to read a register in the RTC. */
22 static uint8_t rx6110sa_read(struct device *dev, uint8_t reg)
23 {
24  return (uint8_t)i2c_dev_readb_at(dev, reg);
25 }
26 
27 /* Set RTC date from coreboot build date. */
28 static void rx6110sa_set_build_date(struct device *dev)
29 {
34 }
35 
36 /* Set RTC date from user defined date (available in e.g. device tree). */
37 static void rx6110sa_set_user_date(struct device *dev)
38 {
40 
41  rx6110sa_write(dev, YEAR_REG, bin2bcd(config->user_year));
42  rx6110sa_write(dev, MONTH_REG, bin2bcd(config->user_month));
43  rx6110sa_write(dev, DAY_REG, bin2bcd(config->user_day));
44  rx6110sa_write(dev, WEEK_REG, (1 << config->user_weekday));
45 }
46 
47 static void rx6110sa_final(struct device *dev)
48 {
49  uint8_t hour, minute, second, year, month, day;
50 
51  /* Read back current RTC date and time and print it to the console. */
52  hour = rx6110sa_read(dev, HOUR_REG);
53  minute = rx6110sa_read(dev, MINUTE_REG);
54  second = rx6110sa_read(dev, SECOND_REG);
55  year = rx6110sa_read(dev, YEAR_REG);
56  month = rx6110sa_read(dev, MONTH_REG);
57  day = rx6110sa_read(dev, DAY_REG);
58 
59  printk(BIOS_INFO, "%s: Current date %02d.%02d.%02d %02d:%02d:%02d\n",
60  dev->chip_ops->name, bcd2bin(month), bcd2bin(day),
61  bcd2bin(year), bcd2bin(hour), bcd2bin(minute), bcd2bin(second));
62 }
63 
64 static void rx6110sa_init(struct device *dev)
65 {
67  uint8_t reg, flags;
68  struct stopwatch sw;
69 
70  /* Do a dummy read first as requested in the datasheet. */
72  /* Check power loss status by reading the VLF-bit. */
73  flags = rx6110sa_read(dev, FLAG_REGISTER);
74  if (flags & VLF_BIT) {
75  /*
76  * Voltage low detected, perform RX6110 SA reset sequence as
77  * requested in the datasheet. The meaning of the registers 0x60
78  * and above is not documented in the datasheet, they have to be
79  * used as requested according to Epson.
80  */
82  rx6110sa_write(dev, CTRL_REG, 0x00);
84  rx6110sa_write(dev, 0x60, 0xd3);
85  rx6110sa_write(dev, 0x66, 0x03);
86  rx6110sa_write(dev, 0x6b, 0x02);
87  rx6110sa_write(dev, 0x6b, 0x01);
88  /* According to the datasheet one have to wait for at least 2 ms
89  * before the VLF bit can be cleared in the flag register after
90  * this reset sequence. As the other registers are still
91  * accessible use the stopwatch to parallel the flow.
92  */
94  }
95  /*
96  * Set up important registers even if there was no power loss to make
97  * sure that the right mode is used as it directly influences the
98  * backup current consumption and therefore the backup time. These
99  * settings do not change current date and time and the RTC will not
100  * be stopped while the registers are set up.
101  */
102  reg = (config->pmon_sampling & PMON_SAMPL_MASK) |
103  (!!config->bks_off << 2) | (!!config->bks_on << 3) |
104  (!!config->iocut_en << 4);
106 
107  /* Clear timer enable bit and set frequency of clock output. */
108  reg = rx6110sa_read(dev, EXTENSION_REG);
109  reg &= ~(FSEL_MASK);
110  reg |= ((config->cof_selection << 6) & FSEL_MASK);
111  if (config->timer_preset) {
112  /* Timer needs to be in stop mode prior to programming it. */
113  if (reg & TE_BIT) {
114  reg &= ~TE_BIT;
115  rx6110sa_write(dev, EXTENSION_REG, reg);
116  }
117  /* Program the timer preset value. */
119  config->timer_preset & 0xff);
121  (config->timer_preset >> 8) & 0xff);
122  /* Set Timer Enable bit and the timer clock value. */
123  reg &= ~TSEL_MASK;
124  reg |= ((!!config->timer_en << 4) |
125  (config->timer_clk & TSEL_MASK));
126  }
127  rx6110sa_write(dev, EXTENSION_REG, reg);
128  rx6110sa_write(dev, CTRL_REG, 0x00);
129  rx6110sa_write(dev, DIGITAL_REG, 0x00);
131  reg = (!!config->enable_1hz_out << 4) |
132  (!!config->irq_output_pin << 2) |
133  (config->fout_output_pin & FOUT_OUTPUT_PIN_MASK);
134  rx6110sa_write(dev, IRQ_CONTROL_REG, reg);
135  /* If there was no power loss event no further steps are needed. */
136  if (!(flags & VLF_BIT))
137  return;
138  /* There was a power loss event, clear voltage low detect bit.
139  * Take the needed delay after a reset sequence into account before the
140  * VLF-bit can be cleared.
141  */
143  flags &= ~VLF_BIT;
144  rx6110sa_write(dev, FLAG_REGISTER, flags);
145 
146  /* Before setting the clock stop oscillator. */
148 
149  if (config->set_user_date) {
150  /* Set user date defined in device tree. */
151  printk(BIOS_DEBUG, "%s: Set to user date\n",
152  dev->chip_ops->name);
154  } else {
155  /* Set date from coreboot build. */
156  printk(BIOS_DEBUG, "%s: Set to coreboot build date\n",
157  dev->chip_ops->name);
159  }
160  rx6110sa_write(dev, HOUR_REG, 1);
161  rx6110sa_write(dev, MINUTE_REG, 0);
162  rx6110sa_write(dev, SECOND_REG, 0);
163  /* Start oscillator again as the RTC is set up now. */
164  reg = (!!config->timer_irq_en << 4) |
165  (config->timer_mode & TMR_MODE_MASK);
166  rx6110sa_write(dev, CTRL_REG, reg);
167 }
168 
169 #if CONFIG(HAVE_ACPI_TABLES) && !CONFIG(RX6110SA_DISABLE_ACPI)
170 static void rx6110sa_fill_ssdt(const struct device *dev)
171 {
173  const char *scope = acpi_device_scope(dev);
174  enum i2c_speed bus_speed;
175 
176  if (!scope)
177  return;
178 
179  switch (config->bus_speed) {
180  case I2C_SPEED_STANDARD:
181  case I2C_SPEED_FAST:
182  bus_speed = config->bus_speed;
183  break;
184  default:
185  printk(BIOS_INFO, "%s: Bus speed unsupported, fall back to %d kHz!\n",
186  dev_path(dev), I2C_SPEED_STANDARD / 1000);
188  break;
189  }
190 
191  struct acpi_i2c i2c = {
192  .address = dev->path.i2c.device,
193  .mode_10bit = dev->path.i2c.mode_10bit,
194  .speed = bus_speed,
195  .resource = scope,
196  };
197 
198  /* Device */
199  acpigen_write_scope(scope);
204 
205  /* Resources */
206  acpigen_write_name("_CRS");
208  acpi_device_write_i2c(&i2c);
209 
211 
212  acpigen_pop_len(); /* Device */
213  acpigen_pop_len(); /* Scope */
214 
215  printk(BIOS_INFO, "%s: %s at %s\n", acpi_device_path(dev),
216  dev->chip_ops->name, dev_path(dev));
217 }
218 
219 static const char *rx6110sa_acpi_name(const struct device *dev)
220 {
221  return RX6110SA_ACPI_NAME;
222 }
223 #endif
224 
225 static struct device_operations rx6110sa_ops = {
227  .set_resources = noop_set_resources,
228  .init = rx6110sa_init,
229  .final = rx6110sa_final,
230 #if CONFIG(HAVE_ACPI_TABLES) && !CONFIG(RX6110SA_DISABLE_ACPI)
231  .acpi_name = rx6110sa_acpi_name,
232  .acpi_fill_ssdt = rx6110sa_fill_ssdt,
233 #endif
234 };
235 
236 static void rx6110sa_enable(struct device *dev)
237 {
238  dev->ops = &rx6110sa_ops;
239 }
240 
242  CHIP_NAME("RX6110 SA")
243  .enable_dev = rx6110sa_enable
244 };
const char * acpi_device_path(const struct device *dev)
Definition: device.c:144
void acpi_device_write_i2c(const struct acpi_i2c *i2c)
Definition: device.c:399
int acpi_device_status(const struct device *dev)
Definition: device.c:193
const char * acpi_device_name(const struct device *dev)
Definition: device.c:49
const char * acpi_device_scope(const struct device *dev)
Definition: device.c:158
void acpigen_pop_len(void)
Definition: acpigen.c:37
void acpigen_write_scope(const char *name)
Definition: acpigen.c:326
void acpigen_write_resourcetemplate_footer(void)
Definition: acpigen.c:1165
void acpigen_write_STA(uint8_t status)
Definition: acpigen.c:783
void acpigen_write_resourcetemplate_header(void)
Definition: acpigen.c:1147
void acpigen_write_device(const char *name)
Definition: acpigen.c:769
void acpigen_write_name(const char *name)
Definition: acpigen.c:320
void acpigen_write_name_string(const char *name, const char *string)
Definition: acpigen.c:176
static uint8_t bin2bcd(uint8_t val)
Definition: bcd.h:13
static uint8_t bcd2bin(uint8_t val)
Definition: bcd.h:8
#define printk(level,...)
Definition: stdlib.h:16
const char * dev_path(const struct device *dev)
Definition: device_util.c:149
int i2c_dev_writeb_at(struct device *const dev, const uint8_t off, const uint8_t val)
Definition: i2c_bus.c:121
int i2c_dev_readb_at(struct device *const dev, uint8_t off)
Definition: i2c_bus.c:84
#define CHIP_NAME(X)
Definition: device.h:32
static void noop_read_resources(struct device *dev)
Standard device operations function pointers shims.
Definition: device.h:73
static void noop_set_resources(struct device *dev)
Definition: device.h:74
i2c_speed
Definition: i2c.h:43
@ I2C_SPEED_STANDARD
Definition: i2c.h:44
@ I2C_SPEED_FAST
Definition: i2c.h:45
static void stopwatch_wait_until_expired(struct stopwatch *sw)
Definition: timer.h:161
static void stopwatch_init_msecs_expire(struct stopwatch *sw, long ms)
Definition: timer.h:133
unsigned int year
Definition: edid.c:53
#define BIOS_INFO
BIOS_INFO - Expected events.
Definition: loglevel.h:113
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
enum board_config config
Definition: memory.c:448
#define HOUR_REG
Definition: pcf8523.h:18
#define MINUTE_REG
Definition: pcf8523.h:17
#define SECOND_REG
Definition: pcf8523.h:15
#define STOP_BIT
Definition: pcf8523.h:10
#define DAY_REG
Definition: pcf8523.h:19
#define YEAR_REG
Definition: pcf8523.h:22
#define MONTH_REG
Definition: pcf8523.h:21
static void rx6110sa_enable(struct device *dev)
Definition: rx6110sa.c:236
static struct device_operations rx6110sa_ops
Definition: rx6110sa.c:225
struct chip_operations drivers_i2c_rx6110sa_ops
Definition: rx6110sa.c:241
static void rx6110sa_final(struct device *dev)
Definition: rx6110sa.c:47
static void rx6110sa_set_build_date(struct device *dev)
Definition: rx6110sa.c:28
static uint8_t rx6110sa_read(struct device *dev, uint8_t reg)
Definition: rx6110sa.c:22
static void rx6110sa_write(struct device *dev, uint8_t reg, uint8_t val)
Definition: rx6110sa.c:16
static void rx6110sa_set_user_date(struct device *dev)
Definition: rx6110sa.c:37
static void rx6110sa_init(struct device *dev)
Definition: rx6110sa.c:64
#define WEEK_REG
Definition: rx6110sa.h:14
#define BATTERY_BACKUP_REG
Definition: rx6110sa.h:42
#define TEST_BIT
Definition: rx6110sa.h:36
#define RX6110SA_ACPI_NAME
Definition: rx6110sa.h:6
#define TMR_COUNTER_0_REG
Definition: rx6110sa.h:23
#define TMR_COUNTER_1_REG
Definition: rx6110sa.h:24
#define FLAG_REGISTER
Definition: rx6110sa.h:29
#define CTRL_REG
Definition: rx6110sa.h:31
#define FSEL_MASK
Definition: rx6110sa.h:27
#define PMON_SAMPL_MASK
Definition: rx6110sa.h:43
#define VLF_BIT
Definition: rx6110sa.h:30
#define DIGITAL_REG
Definition: rx6110sa.h:41
#define RX6110SA_HID_DESC
Definition: rx6110sa.h:8
#define EXTENSION_REG
Definition: rx6110sa.h:25
#define AFTER_RESET_DELAY_MS
Definition: rx6110sa.h:75
#define IRQ_CONTROL_REG
Definition: rx6110sa.h:44
#define TSEL_MASK
Definition: rx6110sa.h:28
#define TE_BIT
Definition: rx6110sa.h:26
#define FOUT_OUTPUT_PIN_MASK
Definition: rx6110sa.h:45
#define RX6110SA_HID_NAME
Definition: rx6110sa.h:7
#define RTC_INIT_VALUE
Definition: rx6110sa.h:19
#define TMR_MODE_MASK
Definition: rx6110sa.h:37
#define RESERVED_BIT_REG
Definition: rx6110sa.h:18
unsigned char uint8_t
Definition: stdint.h:8
uint16_t address
Definition: acpi_device.h:304
unsigned char day
Definition: version.h:24
unsigned char year
Definition: version.h:22
unsigned char weekday
Definition: version.h:25
unsigned char month
Definition: version.h:23
const char * name
Definition: device.h:29
void(* read_resources)(struct device *dev)
Definition: device.h:39
struct i2c_path i2c
Definition: path.h:118
Definition: device.h:107
struct chip_operations * chip_ops
Definition: device.h:144
struct device_path path
Definition: device.h:115
struct device_operations * ops
Definition: device.h:143
DEVTREE_CONST void * chip_info
Definition: device.h:164
unsigned int bus_speed
Definition: chip.h:6
unsigned int device
Definition: path.h:63
unsigned int mode_10bit
Definition: path.h:64
u8 val
Definition: sys.c:300
const struct bcd_date coreboot_build_date
Definition: version.c:39