coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
memmap.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <arch/romstage.h>
4 #include <cbmem.h>
5 #include <cpu/x86/mtrr.h>
6 #include <soc/reg_access.h>
7 
9 {
10  uintptr_t top_of_ram;
12 
13  /* Locate the top of RAM */
15  top_of_ram = ALIGN(top_of_low_usable_memory, 16 * MiB);
16 
17  /* Cache postcar and ramstage */
18  postcar_frame_add_mtrr(pcf, top_of_ram - (16 * MiB), 16 * MiB,
20 
21  /* Cache RMU area */
23  0x10000, MTRR_TYPE_WRTHROUGH);
24 
25  /* Cache ESRAM */
26  postcar_frame_add_mtrr(pcf, 0x80000000, 0x80000, MTRR_TYPE_WRBACK);
27 
28  pcf->skip_common_mtrr = 1;
29  /* Cache SPI flash - Write protect not supported */
31 }
void postcar_frame_add_mtrr(struct postcar_frame *pcf, uintptr_t addr, size_t size, int type)
void postcar_frame_add_romcache(struct postcar_frame *pcf, int type)
#define MiB
Definition: helpers.h:76
void * cbmem_top(void)
Definition: imd_cbmem.c:18
#define ALIGN
Definition: asm.h:22
void fill_postcar_frame(struct postcar_frame *pcf)
Definition: memmap.c:63
static uintptr_t top_of_low_usable_memory(void)
Definition: memmap.c:37
unsigned long uintptr_t
Definition: stdint.h:21
int skip_common_mtrr
Definition: romstage.h:20
#define MTRR_TYPE_WRTHROUGH
Definition: mtrr.h:12
#define MTRR_TYPE_WRBACK
Definition: mtrr.h:14