coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
memmap.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
arch/romstage.h
>
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#include <
cbmem.h
>
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#include <
cpu/x86/mtrr.h
>
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#include <
soc/reg_access.h
>
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void
fill_postcar_frame
(
struct
postcar_frame
*pcf)
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{
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uintptr_t
top_of_ram;
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uintptr_t
top_of_low_usable_memory
;
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/* Locate the top of RAM */
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top_of_low_usable_memory
= (
uintptr_t
)
cbmem_top
();
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top_of_ram =
ALIGN
(
top_of_low_usable_memory
, 16 *
MiB
);
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/* Cache postcar and ramstage */
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postcar_frame_add_mtrr
(pcf, top_of_ram - (16 *
MiB
), 16 *
MiB
,
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MTRR_TYPE_WRBACK
);
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/* Cache RMU area */
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postcar_frame_add_mtrr
(pcf, (
uintptr_t
)
top_of_low_usable_memory
,
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0x10000,
MTRR_TYPE_WRTHROUGH
);
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/* Cache ESRAM */
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postcar_frame_add_mtrr
(pcf, 0x80000000, 0x80000,
MTRR_TYPE_WRBACK
);
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pcf->
skip_common_mtrr
= 1;
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/* Cache SPI flash - Write protect not supported */
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postcar_frame_add_romcache
(pcf,
MTRR_TYPE_WRTHROUGH
);
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}
romstage.h
postcar_frame_add_mtrr
void postcar_frame_add_mtrr(struct postcar_frame *pcf, uintptr_t addr, size_t size, int type)
Definition:
postcar_loader.c:71
postcar_frame_add_romcache
void postcar_frame_add_romcache(struct postcar_frame *pcf, int type)
Definition:
postcar_loader.c:77
MiB
#define MiB
Definition:
helpers.h:76
cbmem.h
cbmem_top
void * cbmem_top(void)
Definition:
imd_cbmem.c:18
ALIGN
#define ALIGN
Definition:
asm.h:22
fill_postcar_frame
void fill_postcar_frame(struct postcar_frame *pcf)
Definition:
memmap.c:63
top_of_low_usable_memory
static uintptr_t top_of_low_usable_memory(void)
Definition:
memmap.c:37
reg_access.h
uintptr_t
unsigned long uintptr_t
Definition:
stdint.h:21
postcar_frame
Definition:
romstage.h:18
postcar_frame::skip_common_mtrr
int skip_common_mtrr
Definition:
romstage.h:20
mtrr.h
MTRR_TYPE_WRTHROUGH
#define MTRR_TYPE_WRTHROUGH
Definition:
mtrr.h:12
MTRR_TYPE_WRBACK
#define MTRR_TYPE_WRBACK
Definition:
mtrr.h:14
src
soc
intel
quark
memmap.c
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