coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
spd.c
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#include <
mainboard/google/auron/variant.h
>
4
#include <
southbridge/intel/lynxpoint/lp_gpio.h
>
5
6
/* Auron board memory configuration GPIOs */
7
#define SPD_GPIO_BIT0 13
8
#define SPD_GPIO_BIT1 9
9
#define SPD_GPIO_BIT2 47
10
11
unsigned
int
variant_get_spd_index
(
void
)
12
{
13
const
int
gpio_vector[] = {
14
SPD_GPIO_BIT0
,
15
SPD_GPIO_BIT1
,
16
SPD_GPIO_BIT2
,
17
-1,
18
};
19
return
get_gpios
(gpio_vector);
20
}
21
22
bool
variant_is_dual_channel
(
const
unsigned
int
spd_index
)
23
{
24
/* Index 0-2 are 4GB config with both CH0 and CH1.
25
* Index 4-6 are 2GB config with CH0 only. */
26
return
!(
spd_index
> 3);
27
}
variant.h
lp_gpio.h
variant_is_dual_channel
bool variant_is_dual_channel(const unsigned int spd_index)
Definition:
spd.c:22
SPD_GPIO_BIT1
#define SPD_GPIO_BIT1
Definition:
spd.c:8
variant_get_spd_index
unsigned int variant_get_spd_index(void)
Definition:
spd.c:11
SPD_GPIO_BIT0
#define SPD_GPIO_BIT0
Definition:
spd.c:7
SPD_GPIO_BIT2
#define SPD_GPIO_BIT2
Definition:
spd.c:9
spd_index
static const int spd_index[32]
Definition:
memory.c:10
get_gpios
unsigned int get_gpios(const int *gpio_num_array)
Definition:
gpio.c:107
src
mainboard
google
auron
variants
auron_paine
spd
spd.c
Generated by
1.9.1