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◆ GPI_LEVEL
#define GPI_LEVEL (1 << 30) |
◆ GPIO_BLINK
◆ GPIO_CONFIG0
#define GPIO_CONFIG0 |
( |
|
gpio | ) |
(0x100 + ((gpio) * 8)) |
◆ GPIO_CONFIG1
#define GPIO_CONFIG1 |
( |
|
gpio | ) |
(0x104 + ((gpio) * 8)) |
◆ GPIO_DIR_INPUT
#define GPIO_DIR_INPUT (1 << 2) |
◆ GPIO_DIR_OUTPUT
#define GPIO_DIR_OUTPUT (0 << 2) |
◆ GPIO_GLOBAL_CONFIG
#define GPIO_GLOBAL_CONFIG 0x7c |
◆ GPIO_INVERT
#define GPIO_INVERT (1 << 3) |
◆ GPIO_IRQ_DISABLE
#define GPIO_IRQ_DISABLE 0 |
◆ GPIO_IRQ_EDGE
#define GPIO_IRQ_EDGE (0 << 4) |
◆ GPIO_IRQ_ENABLE
#define GPIO_IRQ_ENABLE 1 |
◆ GPIO_IRQ_IE
#define GPIO_IRQ_IE |
( |
|
set | ) |
(0x90 + ((set) * 4)) |
◆ GPIO_IRQ_IS
#define GPIO_IRQ_IS |
( |
|
set | ) |
(0x80 + ((set) * 4)) |
◆ GPIO_IRQ_LEVEL
#define GPIO_IRQ_LEVEL (1 << 4) |
◆ GPIO_LIST_END
#define GPIO_LIST_END 0xffffffff |
◆ GPIO_MODE_GPIO
#define GPIO_MODE_GPIO (1 << 0) |
◆ GPIO_MODE_NATIVE
#define GPIO_MODE_NATIVE (0 << 0) |
◆ GPIO_NO_INVERT
#define GPIO_NO_INVERT (0 << 3) |
◆ GPIO_OWNER
#define GPIO_OWNER |
( |
|
set | ) |
(0x00 + ((set) * 4)) |
◆ GPIO_OWNER_ACPI
#define GPIO_OWNER_ACPI 0 |
◆ GPIO_OWNER_GPIO
#define GPIO_OWNER_GPIO 1 |
◆ GPIO_PIRQ_APIC_EN
#define GPIO_PIRQ_APIC_EN 0x10 |
◆ GPIO_PIRQ_APIC_MASK
#define GPIO_PIRQ_APIC_MASK 0 |
◆ GPIO_PIRQ_APIC_ROUTE
#define GPIO_PIRQ_APIC_ROUTE 1 |
◆ GPIO_PULL_DOWN
#define GPIO_PULL_DOWN (1 << 0) |
◆ GPIO_PULL_NONE
#define GPIO_PULL_NONE (0 << 0) |
◆ GPIO_PULL_UP
#define GPIO_PULL_UP (2 << 0) |
◆ GPIO_RESET
#define GPIO_RESET |
( |
|
set | ) |
(0x60 + ((set) * 4)) |
◆ GPIO_RESET_PWROK
#define GPIO_RESET_PWROK 0 |
◆ GPIO_RESET_RSMRST
#define GPIO_RESET_RSMRST 1 |
◆ GPIO_ROUTE
#define GPIO_ROUTE |
( |
|
set | ) |
(0x30 + ((set) * 4)) |
◆ GPIO_ROUTE_SCI
◆ GPIO_ROUTE_SMI
◆ GPIO_SENSE_DISABLE
#define GPIO_SENSE_DISABLE (1 << 2) |
◆ GPIO_SENSE_ENABLE
#define GPIO_SENSE_ENABLE (0 << 2) |
◆ GPIO_SER_BLINK
#define GPIO_SER_BLINK 0x1c |
◆ GPIO_SER_BLINK_CS
#define GPIO_SER_BLINK_CS 0x20 |
◆ GPIO_SER_BLINK_DATA
#define GPIO_SER_BLINK_DATA 0x24 |
◆ GPO_BLINK
◆ GPO_LEVEL_HIGH
◆ GPO_LEVEL_LOW
◆ GPO_LEVEL_MASK
◆ GPO_LEVEL_SHIFT
#define GPO_LEVEL_SHIFT 31 |
◆ GPO_NO_BLINK
◆ LP_GPIO_ACPI_SCI
◆ LP_GPIO_ACPI_SMI
◆ LP_GPIO_END
◆ LP_GPIO_INPUT
◆ LP_GPIO_INPUT_INVERT
#define LP_GPIO_INPUT_INVERT |
◆ LP_GPIO_IRQ_EDGE
◆ LP_GPIO_IRQ_LEVEL
#define LP_GPIO_IRQ_LEVEL |
◆ LP_GPIO_NATIVE
◆ LP_GPIO_OUT_HIGH
Value:
#define GPIO_SENSE_DISABLE
Definition at line 135 of file lp_gpio.h.
◆ LP_GPIO_OUT_LOW
◆ LP_GPIO_PIRQ
Value:
#define GPIO_PIRQ_APIC_ROUTE
Definition at line 125 of file lp_gpio.h.
◆ LP_GPIO_PIRQ_INVERT
#define LP_GPIO_PIRQ_INVERT |
◆ LP_GPIO_UNUSED
◆ MAX_GPIO_NUMBER
#define MAX_GPIO_NUMBER 94 /* zero based */ |
◆ get_gpio()
int get_gpio |
( |
int |
gpio_num | ) |
|
◆ get_gpios()
unsigned int get_gpios |
( |
const int * |
gpio_num_array | ) |
|
◆ gpio_is_native()
int gpio_is_native |
( |
int |
gpio_num | ) |
|
◆ set_gpio()
void set_gpio |
( |
int |
gpio_num, |
|
|
int |
value |
|
) |
| |
Definition at line 125 of file gpio.c.
References pch_lp_gpio_map::conf0, config, get_gpio_base(), GP_LVL, GP_LVL2, GP_LVL3, GPIO_CONFIG0, GPO_LEVEL_MASK, GPO_LEVEL_SHIFT, inl(), MAX_GPIO_NUMBER, outl(), and value.
Referenced by dock_connect(), dock_disconnect(), early_hybrid_graphics(), mainboard_disable_gpios(), mainboard_post_raminit(), mainboard_smi_sleep(), and mb_post_raminit_setup().
◆ setup_pch_lp_gpios()
Definition at line 50 of file lp_gpio.c.
References pch_lp_gpio_map::blink, config, get_gpio_base(), GPIO_BLINK, GPIO_CONFIG0, GPIO_CONFIG1, GPIO_IRQ_IE, GPIO_LIST_END, GPIO_OWNER, GPIO_PIRQ_APIC_EN, GPIO_PIRQ_APIC_ROUTE, GPIO_RESET, GPIO_ROUTE, pch_lp_gpio_map::irqen, lp_gpio_to_pirq(), MAX_GPIO_NUMBER, outl(), pch_lp_gpio_map::owner, reset(), and pch_lp_gpio_map::route.
Referenced by early_pch_init(), and mainboard_romstage_entry().
◆ __packed
◆ mainboard_lp_gpio_map