3 #include <baseboard/variants.h>
5 #include <soc/meminit.h>
13 .dqs[
LP4_DQS1] = { 11, 15, 14, 9, 8, 12, 13, 10 },
15 .dqs[
LP4_DQS2] = { 16, 22, 23, 21, 19, 17, 18, 20 },
17 .dqs[
LP4_DQS3] = { 30, 26, 31, 25, 24, 27, 28, 29 },
21 .dqs[
LP4_DQS0] = { 7, 3, 2, 1, 4, 0, 6, 5 },
23 .dqs[
LP4_DQS1] = { 14, 8, 9, 15, 10, 13, 12, 11 },
25 .dqs[
LP4_DQS2] = { 23, 21, 20, 16, 19, 17, 18, 22 },
27 .dqs[
LP4_DQS3] = { 24, 25, 26, 28, 29, 31, 30, 27 },
31 .dqs[
LP4_DQS0] = { 6, 3, 1, 7, 4, 2, 5, 0 },
33 .dqs[
LP4_DQS1] = { 14, 15, 12, 13, 11, 8, 10, 9 },
35 .dqs[
LP4_DQS2] = { 16, 22, 17, 18, 20, 21, 23, 19 },
37 .dqs[
LP4_DQS3] = { 31, 28, 26, 25, 29, 24, 27, 30 },
41 .dqs[
LP4_DQS0] = { 3, 5, 7, 4, 1, 0, 6, 2 },
43 .dqs[
LP4_DQS1] = { 14, 13, 10, 11, 15, 9, 8, 12 },
45 .dqs[
LP4_DQS2] = { 23, 18, 19, 22, 16, 17, 21, 20 },
47 .dqs[
LP4_DQS3] = { 24, 31, 30, 29, 26, 27, 25, 28 },
const struct lpddr4_swizzle_cfg *__weak variant_lpddr4_swizzle_config(void)
const struct lpddr4_swizzle_cfg mc_apl4_lpddr4_swizzle
uint8_t dqs[LP4_NUM_BYTE_LANES][DQ_BITS_PER_DQS]
struct lpddr4_chan_swizzle_cfg phys[LP4_NUM_PHYS_CHANNELS]