coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <baseboard/variant.h>
5 #include <gpio.h>
6 #include <soc/romstage.h>
7 #include <variant/ec.h>
8 #include <variant/gpio.h>
9 
10 #include "spd/spd_util.h"
11 #include "spd/spd.h"
12 
13 void mainboard_memory_init_params(FSPM_UPD *mupd)
14 {
15  FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
16 
17 #ifdef EC_ENABLE_KEYBOARD_BACKLIGHT
18  /* Turn on keyboard backlight to indicate we are booting */
19  const FSPM_ARCH_UPD *arch_upd = &mupd->FspmArchUpd;
20  if (arch_upd->BootMode != FSP_BOOT_ON_S3_RESUME)
22 #endif
23 
24  /* Get SPD index */
25  const gpio_t spd_gpios[] = {
30  };
31  const int spd_idx = gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
32 
33  mem_cfg->MemorySpdDataLen = SPD_LEN;
34  mem_cfg->DqPinsInterleaved = FALSE;
35 
36  spd_memory_init_params(mupd, spd_idx);
37  variant_memory_init_params(mupd, spd_idx);
38 }
#define ARRAY_SIZE(a)
Definition: helpers.h:12
int google_chromeec_kbbacklight(int percent)
Definition: ec.c:75
@ FSP_BOOT_ON_S3_RESUME
Definition: api.h:23
#define FSP_M_CONFIG
Definition: fsp_upd.h:8
uint32_t gpio_base2_value(const gpio_t gpio[], int num_gpio)
Definition: gpio.c:30
void mainboard_memory_init_params(FSPM_UPD *mupd)
Definition: romstage.c:22
#define SPD_LEN
Definition: spd.c:22
__weak void variant_memory_init_params(MEMORY_INIT_UPD *memory_params)
Definition: romstage.c:18
void spd_memory_init_params(MEMORY_INIT_UPD *memory_params)
Definition: spd.c:59
#define GPIO_MEM_CONFIG_3
Definition: gpio.h:27
#define GPIO_MEM_CONFIG_0
Definition: gpio.h:24
#define GPIO_MEM_CONFIG_2
Definition: gpio.h:26
#define GPIO_MEM_CONFIG_1
Definition: gpio.h:25