4 #include <soc/ramstage.h>
19 silconfig->EnableCx = 1;
27 silconfig->PkgCStateLimit = 0;
28 silconfig->MaxCoreCState = 3;
29 silconfig->CStateAutoDemotion = 0;
30 silconfig->CStateUnDemotion = 0;
31 silconfig->PkgCStateDemotion = 1;
32 silconfig->PkgCStateUnDemotion = 1;
33 silconfig->PmSupport = 1;
34 silconfig->EnableRenderStandby = 1;
35 silconfig->LPSS_S0ixEnable = 1;
36 silconfig->InitS3Cpu = 1;
39 silconfig->HpetBdfValid = 1;
40 silconfig->HpetBusNumber = 0xFA;
41 silconfig->HpetDeviceNumber = 0x0F;
42 silconfig->HpetFunctionNumber = 0;
45 silconfig->IoApicId = 1;
46 silconfig->IoApicBdfValid = 1;
47 silconfig->IoApicBusNumber = 0xFA;
48 silconfig->IoApicDeviceNumber = 0x1F;
49 silconfig->IoApicFunctionNumber = 0;
__weak void mainboard_silicon_init_params(SILICON_INIT_UPD *params)
struct chip_operations mainboard_ops
void carrier_gpio_configure(void)
static void init_mainboard(void *chip_info)
void(* init)(void *chip_info)