coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <bootmode.h>
#include <bootsplash.h>
#include <console/console.h>
#include <fsp/ramstage.h>
#include <fsp/util.h>
#include <framebuffer_info.h>
#include <lib.h>
#include <stage_cache.h>
#include <string.h>
#include <timestamp.h>
Go to the source code of this file.
Functions | |
static void | display_hob_info (FSP_INFO_HEADER *fsp_info_header) |
static void | fsp_run_silicon_init (FSP_INFO_HEADER *fsp_info_header) |
static void | fsp_load (void) |
void | intel_silicon_init (void) |
__weak void | mainboard_silicon_init_params (SILICON_INIT_UPD *params) |
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Definition at line 14 of file ramstage.c.
References BIOS_ERR, CONFIG, get_guid_hob(), get_hob_list(), GRAPHICS_SUPPORT_BIT, NULL, print_hob_type_structure(), and printk.
Referenced by fsp_run_silicon_init().
Definition at line 138 of file ramstage.c.
References fsp_relocate(), fsp_update_fih(), prog_entry(), PROG_INIT, PROG_REFCODE, resume_from_stage_cache(), stage_cache_add(), stage_cache_load_stage(), and STAGE_REFCODE.
Referenced by intel_silicon_init().
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Definition at line 46 of file ramstage.c.
References BIOS_DEBUG, BIOS_ERR, bmp_load_logo(), bmp_release_logo(), CONFIG, display_hob_info(), fb_add_framebuffer_info(), fsp_silicon_init(), get_guid_hob(), get_hob_list(), gfx_set_init_done(), load_vbt(), mainboard_silicon_init_params(), memcpy(), NULL, post_code, POST_FSP_SILICON_INIT, print_fsp_info(), printk, soc_display_silicon_init_params(), soc_silicon_init_params(), timestamp_add_now(), TS_FSP_SILICON_INIT_END, and TS_FSP_SILICON_INIT_START.
Referenced by intel_silicon_init().
Definition at line 155 of file ramstage.c.
References fsp_get_fih(), fsp_load(), and fsp_run_silicon_init().
Referenced by soc_init_pre_device().
Definition at line 162 of file ramstage.c.
Referenced by fsp_run_silicon_init().