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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <delay.h>
#include <device/mmio.h>
#include <console/console.h>
#include <soc/clock.h>
#include "usb.h"
Go to the source code of this file.
Data Structures | |
struct | utmip_ctlr |
struct | usb_ctlr |
Functions | |
check_member (utmip_ctlr, pmc_wakeup, 0x84c - 0x800) | |
check_member (usb_ctlr, utmip, 0x800) | |
static void | usb_ehci_reset_and_prepare (struct usb_ctlr *usb, enum usb_phy_type type) |
void | usb_setup_utmip (void *usb_base) |
check_member | ( | usb_ctlr | , |
utmip | , | ||
0x800 | |||
) |
check_member | ( | utmip_ctlr | , |
pmc_wakeup | , | ||
0x84c - | 0x800 | ||
) |
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static |
Definition at line 108 of file usb.c.
References BIOS_ERR, usb_ctlr::ehci_usbcmd, usb_ctlr::lpm_ctrl, printk, read32(), usb_ctlr::tx_fill_tuning, type, usb_ctlr::usb_mode, and write32().
Referenced by usb_setup_utmip().
Definition at line 131 of file usb.c.
References utmip_ctlr::bias0, utmip_ctlr::bias1, BIOS_DEBUG, clock_get_pll_input_khz(), clrbits32, utmip_ctlr::debounce, utmip_ctlr::hsrx0, khz, utmip_ctlr::misc1, printk, setbits32, usb_ctlr::suspend_ctrl, utmip_ctlr::tx, udelay(), usb_ehci_reset_and_prepare(), USB_PHY_UTMIP, usb_ctlr::utmip, write32(), utmip_ctlr::xcvr0, and utmip_ctlr::xcvr1.
Referenced by mainboard_init().