coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mainboard.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/mmio.h>
4 #include <device/device.h>
5 #include <boot/coreboot_tables.h>
6 #include <gpio.h>
7 #include <soc/addressmap.h>
8 #include <soc/clock.h>
9 #include <soc/clk_rst.h>
10 #include <soc/mc.h>
11 #include <soc/nvidia/tegra/i2c.h>
12 #include <soc/nvidia/tegra/usb.h>
13 #include <soc/pmc.h>
14 #include <soc/spi.h>
15 #include <symbols.h>
16 
17 static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;
18 
19 static void set_clock_sources(void)
20 {
21  /*
22  * The max98090 codec and the temperature sensor are on I2C1. These
23  * can both run at 400 KHz, but the kernel sets the bus to 100 KHz.
24  */
26 
27  /*
28  * MMC3 and MMC4: Set base clock frequency for SD Clock to Tegra MMC's
29  * maximum speed (48MHz) so we can change SDCLK by second stage divisor
30  * in payloads, without touching base clock.
31  */
32  clock_configure_source(sdmmc3, PLLP, 48000);
33  clock_configure_source(sdmmc4, PLLP, 48000);
34 
35  /* External peripheral 1: audio codec (max98090) using 12MHz CLK1.
36  * Note the source id of CLK_M for EXTPERIPH1 is 3. */
37  clock_configure_irregular_source(extperiph1, CLK_M, 12000, 3);
38 
39  /*
40  * We need 1.5MHz. So, we use CLK_M. CLK_DIVIDER macro returns a divisor
41  * (0xe) a little bit off from the ideal value (0xd) but it's good
42  * enough for beeps. The source id of CLK_M for I2S is 6.
43  */
45 
46  /* Note source id of PLLP for HOST1x is 4. */
47  clock_configure_irregular_source(host1x, PLLP, 408000, 4);
48 
49  /* Use PLLD_OUT0 as clock source for disp1 */
52  2 /*PLLD_OUT0 */ << CLK_SOURCE_SHIFT);
53 
54 }
55 
56 static void setup_pinmux(void)
57 {
58  // I2C1 clock.
59  pinmux_set_config(PINMUX_GEN1_I2C_SCL_INDEX,
60  PINMUX_GEN1_I2C_SCL_FUNC_I2C1 | PINMUX_INPUT_ENABLE);
61  // I2C1 data.
62  pinmux_set_config(PINMUX_GEN1_I2C_SDA_INDEX,
63  PINMUX_GEN1_I2C_SDA_FUNC_I2C1 | PINMUX_INPUT_ENABLE);
64  // I2C2 clock.
65  pinmux_set_config(PINMUX_GEN2_I2C_SCL_INDEX,
66  PINMUX_GEN2_I2C_SCL_FUNC_I2C2 | PINMUX_INPUT_ENABLE |
68  // I2C2 data.
69  pinmux_set_config(PINMUX_GEN2_I2C_SDA_INDEX,
70  PINMUX_GEN2_I2C_SDA_FUNC_I2C2 | PINMUX_INPUT_ENABLE |
72  // I2C4 (DDC) clock.
73  pinmux_set_config(PINMUX_DDC_SCL_INDEX,
74  PINMUX_DDC_SCL_FUNC_I2C4 | PINMUX_INPUT_ENABLE);
75  // I2C4 (DDC) data.
76  pinmux_set_config(PINMUX_DDC_SDA_INDEX,
77  PINMUX_DDC_SDA_FUNC_I2C4 | PINMUX_INPUT_ENABLE);
78 
79  // TODO(hungte) Revice pinmux setup, make nice little SoC functions for
80  // every single logical thing instead of dumping a wall of code below.
84 
85  // MMC3 (sdcard reader)
86  pinmux_set_config(PINMUX_SDMMC3_CLK_INDEX,
87  PINMUX_SDMMC3_CLK_FUNC_SDMMC3 | pin_none);
88  pinmux_set_config(PINMUX_SDMMC3_CMD_INDEX,
89  PINMUX_SDMMC3_CMD_FUNC_SDMMC3 | pin_up);
90  pinmux_set_config(PINMUX_SDMMC3_DAT0_INDEX,
91  PINMUX_SDMMC3_DAT0_FUNC_SDMMC3 | pin_up);
92  pinmux_set_config(PINMUX_SDMMC3_DAT1_INDEX,
93  PINMUX_SDMMC3_DAT1_FUNC_SDMMC3 | pin_up);
94  pinmux_set_config(PINMUX_SDMMC3_DAT2_INDEX,
95  PINMUX_SDMMC3_DAT2_FUNC_SDMMC3 | pin_up);
96  pinmux_set_config(PINMUX_SDMMC3_DAT3_INDEX,
97  PINMUX_SDMMC3_DAT3_FUNC_SDMMC3 | pin_up);
98  pinmux_set_config(PINMUX_SDMMC3_CLK_LB_IN_INDEX,
99  PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up);
100  pinmux_set_config(PINMUX_SDMMC3_CLK_LB_OUT_INDEX,
101  PINMUX_SDMMC3_CLK_LB_OUT_FUNC_SDMMC3 | pin_down);
102 
103  // MMC3 Card Detect pin.
104  gpio_input_pullup(GPIO(V2));
105  // Disable SD card reader power so it can be reset even on warm boot.
106  // Payloads must enable power before accessing SD card slots.
107  gpio_output(GPIO(R0), 0);
108 
109  // MMC4 (eMMC)
110  pinmux_set_config(PINMUX_SDMMC4_CLK_INDEX,
111  PINMUX_SDMMC4_CLK_FUNC_SDMMC4 | pin_none);
112  pinmux_set_config(PINMUX_SDMMC4_CMD_INDEX,
113  PINMUX_SDMMC4_CMD_FUNC_SDMMC4 | pin_up);
114  pinmux_set_config(PINMUX_SDMMC4_DAT0_INDEX,
115  PINMUX_SDMMC4_DAT0_FUNC_SDMMC4 | pin_up);
116  pinmux_set_config(PINMUX_SDMMC4_DAT1_INDEX,
117  PINMUX_SDMMC4_DAT1_FUNC_SDMMC4 | pin_up);
118  pinmux_set_config(PINMUX_SDMMC4_DAT2_INDEX,
119  PINMUX_SDMMC4_DAT2_FUNC_SDMMC4 | pin_up);
120  pinmux_set_config(PINMUX_SDMMC4_DAT3_INDEX,
121  PINMUX_SDMMC4_DAT3_FUNC_SDMMC4 | pin_up);
122  pinmux_set_config(PINMUX_SDMMC4_DAT4_INDEX,
123  PINMUX_SDMMC4_DAT4_FUNC_SDMMC4 | pin_up);
124  pinmux_set_config(PINMUX_SDMMC4_DAT5_INDEX,
125  PINMUX_SDMMC4_DAT5_FUNC_SDMMC4 | pin_up);
126  pinmux_set_config(PINMUX_SDMMC4_DAT6_INDEX,
127  PINMUX_SDMMC4_DAT6_FUNC_SDMMC4 | pin_up);
128  pinmux_set_config(PINMUX_SDMMC4_DAT7_INDEX,
129  PINMUX_SDMMC4_DAT7_FUNC_SDMMC4 | pin_up);
130 
131  /* We pull the USB VBUS signals up but keep them as inputs since the
132  * voltage source likes to drive them low on overcurrent conditions */
133  gpio_input_pullup(GPIO(N4)); /* USB VBUS EN0 */
134  gpio_input_pullup(GPIO(N5)); /* USB VBUS EN1 */
135 
136  /* Clock output 1 (for external peripheral) */
137  pinmux_set_config(PINMUX_DAP_MCLK1_INDEX,
138  PINMUX_DAP_MCLK1_FUNC_EXTPERIPH1 | PINMUX_PULL_NONE);
139 
140  /* I2S1 */
141  pinmux_set_config(PINMUX_DAP2_DIN_INDEX,
142  PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
143  pinmux_set_config(PINMUX_DAP2_DOUT_INDEX,
144  PINMUX_DAP2_DOUT_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
145  pinmux_set_config(PINMUX_DAP2_FS_INDEX,
146  PINMUX_DAP2_FS_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
147  pinmux_set_config(PINMUX_DAP2_SCLK_INDEX,
148  PINMUX_DAP2_SCLK_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
149 
150  /* PWM1 */
151  pinmux_set_config(PINMUX_GPIO_PH1_INDEX,
152  PINMUX_GPIO_PH1_FUNC_PWM1 | PINMUX_PULL_NONE);
153 
154  /* DP HPD */
155  pinmux_set_config(PINMUX_DP_HPD_INDEX,
156  PINMUX_DP_HPD_FUNC_DP | PINMUX_INPUT_ENABLE);
157 }
158 
159 static void setup_kernel_info(void)
160 {
161  // Setup required information for Linux kernel.
162 
163  // pmc.odmdata: [18:19]: console type, [15:17]: UART id.
164  // TODO(hungte) This should be done by filling BCT values, or derived
165  // from CONFIG_CONSOLE_SERIAL_UART[A-E]. Right now we simply copy the
166  // value defined in BCT.
167  struct tegra_pmc_regs *pmc = (void*)TEGRA_PMC_BASE;
168  write32(&pmc->odmdata, 0x80080000);
169 
170  // Not strictly info, but kernel graphics driver needs this region locked down
171  struct tegra_mc_regs *mc = (void *)TEGRA_MC_BASE;
172  write32(&mc->video_protect_bom, 0);
175 }
176 
177 static void setup_ec_spi(void)
178 {
179  tegra_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS);
180 }
181 
182 static void mainboard_init(struct device *dev)
183 {
185 
186  clock_external_output(1); /* For external MAX98090 audio codec. */
187 
188  /*
189  * Confirmed by NVIDIA hardware team, we need to take ALL audio devices
190  * conntected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out
191  * of reset and clock-enabled, otherwise reading AHUB devices (In our
192  * case, I2S/APBIF/AUDIO<XBAR>) will hang.
193  *
194  * Note that CLK_H_MEM (MC) and CLK_H_EMC should be already either
195  * initialized by BootROM, or in romstage SDRAM initialization.
196  */
201 
203 
205 
209 
211 
215  CLK_X_AFC5);
216 
218  /* USB2 is the camera, we don't need it in firmware */
220 
221  setup_pinmux();
222 
223  i2c_init(0);
224  i2c_init(1);
225  i2c_init(3);
226 
229  setup_ec_spi();
230 }
231 
232 static void mainboard_enable(struct device *dev)
233 {
234  dev->ops->init = &mainboard_init;
235 }
236 
239 };
240 
241 void lb_board(struct lb_header *header)
242 {
243  struct lb_range *dma;
244 
245  dma = (struct lb_range *)lb_new_record(header);
246  dma->tag = LB_TAG_DMA;
247  dma->size = sizeof(*dma);
248  dma->range_start = (uintptr_t)_dma_coherent;
249  dma->range_size = REGION_SIZE(dma_coherent);
250 }
struct chip_operations mainboard_ops
Definition: mainboard.c:19
struct arm64_kernel_header header
Definition: fit_payload.c:30
static void write32(void *addr, uint32_t val)
Definition: mmio.h:40
@ LB_TAG_DMA
int dma_coherent(void *ptr)
@ GPIO
Definition: chip.h:84
void lb_board(struct lb_header *header)
Definition: mainboard.c:325
static void mainboard_init(struct device *dev)
Definition: mainboard.c:182
static void setup_pinmux(void)
Definition: mainboard.c:56
static void set_clock_sources(void)
Definition: mainboard.c:19
static void setup_ec_spi(void)
Definition: mainboard.c:177
static void mainboard_enable(struct device *dev)
Definition: mainboard.c:232
static struct clk_rst_ctlr * clk_rst
Definition: mainboard.c:17
static void setup_kernel_info(void)
Definition: mainboard.c:159
struct lb_record * lb_new_record(struct lb_header *header)
#define clrsetbits32(addr, clear, set)
Definition: mmio.h:16
void gpio_output(gpio_t gpio, int value)
Definition: gpio.c:194
void gpio_input_pullup(gpio_t gpio)
Definition: gpio.c:184
#define REGION_SIZE(name)
Definition: symbols.h:10
@ PINMUX_INPUT_ENABLE
Definition: pinmux.h:17
@ PINMUX_PULL_NONE
Definition: pinmux.h:12
@ PINMUX_PULL_DOWN
Definition: pinmux.h:13
@ PINMUX_PULL_UP
Definition: pinmux.h:14
@ PINMUX_OPEN_DRAIN
Definition: pinmux.h:18
void pinmux_set_config(int pin_index, uint32_t config)
Definition: pinmux.c:10
struct @1399 * dma
void clock_external_output(int clk_id)
Definition: clock.c:396
static struct tegra_pmc_regs * pmc
Definition: clock.c:19
void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x)
Definition: clock.c:600
void clock_init_arm_generic_timer(void)
Definition: clock.c:168
@ TEGRA_CLK_RST_BASE
Definition: addressmap.h:21
@ TEGRA_MC_BASE
Definition: addressmap.h:53
@ TEGRA_USBD_BASE
Definition: addressmap.h:57
@ TEGRA_USB3_BASE
Definition: addressmap.h:59
@ TEGRA_PMC_BASE
Definition: addressmap.h:51
@ CLK_L_I2S2
Definition: clock.h:29
@ CLK_V_I2S4
Definition: clock.h:112
@ CLK_H_PMC
Definition: clock.h:48
@ CLK_L_USBD
Definition: clock.h:33
@ CLK_H_I2C2
Definition: clock.h:61
@ CLK_X_AFC0
Definition: clock.h:140
@ CLK_W_DVFS
Definition: clock.h:135
@ CLK_L_GPIO
Definition: clock.h:20
@ CLK_X_AFC2
Definition: clock.h:142
@ CLK_U_SDMMC3
Definition: clock.h:76
@ CLK_W_AMX0
Definition: clock.h:133
@ CLK_X_SOR0
Definition: clock.h:148
@ CLK_X_AMX1
Definition: clock.h:146
@ CLK_L_SDMMC4
Definition: clock.h:27
@ CLK_X_DPAUX
Definition: clock.h:149
@ CLK_L_PWM
Definition: clock.h:28
@ CLK_L_HOST1X
Definition: clock.h:38
@ CLK_L_I2S0
Definition: clock.h:40
@ CLK_X_AFC4
Definition: clock.h:144
@ CLK_L_I2S1
Definition: clock.h:23
@ CLK_V_DAM1
Definition: clock.h:119
@ CLK_X_AFC1
Definition: clock.h:141
@ CLK_V_AUDIO
Definition: clock.h:116
@ CLK_H_USB3
Definition: clock.h:66
@ CLK_L_I2C1
Definition: clock.h:24
@ CLK_V_APBIF
Definition: clock.h:117
@ CLK_W_ADX0
Definition: clock.h:134
@ CLK_L_DISP1
Definition: clock.h:37
@ CLK_V_I2S3
Definition: clock.h:111
@ CLK_X_ADX1
Definition: clock.h:150
@ CLK_V_EXTPERIPH1
Definition: clock.h:124
@ CLK_V_DAM0
Definition: clock.h:118
@ CLK_V_I2C4
Definition: clock.h:113
@ CLK_L_SPDIF
Definition: clock.h:22
@ CLK_X_AFC5
Definition: clock.h:145
@ CLK_X_AFC3
Definition: clock.h:143
@ CLK_V_DAM2
Definition: clock.h:120
@ CLK_U_CSITE
Definition: clock.h:80
#define clock_configure_irregular_source(device, src, freq, src_id)
Definition: clock.h:223
#define clock_configure_i2c_scl_freq(device, src, freq)
Definition: clock.h:239
#define clock_configure_source(device, src, freq)
Definition: clock.h:229
@ PLLP
Definition: clock.h:245
@ CLK_M
Definition: clock.h:253
struct tegra_spi_channel * tegra_spi_init(unsigned int bus)
Definition: spi.c:156
void i2c_init(unsigned int bus)
Definition: i2c.c:198
void usb_setup_utmip(void *usb_base)
Definition: usb.c:131
unsigned int uint32_t
Definition: stdint.h:14
unsigned long uintptr_t
Definition: stdint.h:21
void(* enable_dev)(struct device *dev)
Definition: device.h:24
u32 clk_src_disp1
Definition: clk_rst.h:73
void(* init)(struct device *dev)
Definition: device.h:42
Definition: device.h:107
struct device_operations * ops
Definition: device.h:143
uint32_t video_protect_size_mb
Definition: mc.h:73
uint32_t video_protect_bom
Definition: mc.h:72
uint32_t video_protect_reg_ctrl
Definition: mc.h:74
u32 odmdata
Definition: pmc.h:71
#define CLK_SOURCE_SHIFT
Definition: clk_rst.h:410
#define CLK_SOURCE_MASK
Definition: clk_rst.h:411
#define CLK_DIVISOR_MASK
Definition: clk_rst.h:408