coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <soc/dramc_param.h>
4 
5 struct sdram_params params = {
7  .ddr_geometry = DDR_TYPE_2CH_RK0_RK1_BYTE_8GB_4_4,
8  .frequency = 1600,
9  .rank_num = 2,
10  .wr_level = {
11  [CHANNEL_A] = { {0x1F, 0x19}, {0x20, 0x1A} },
12  [CHANNEL_B] = { {0x22, 0x1E}, {0x22, 0x1E} }
13  },
14  .cbt_cs_dly = {
15  [CHANNEL_A] = {0x5, 0x4},
16  [CHANNEL_B] = {0x8, 0x8}
17  },
18  .cbt_final_vref = {
19  [CHANNEL_A] = {0x56, 0x56},
20  [CHANNEL_B] = {0x56, 0x56}
21  },
22  .emi_cona_val = 0xF053F154,
23  .emi_conh_val = 0x44440003,
24  .emi_conf_val = 0x00421000,
25  .chn_emi_cona_val = {0x0444F051, 0x0444F051},
26  .cbt_mode_extern = CBT_BYTE_MODE1,
27  .delay_cell_unit = 868,
28 };
@ CBT_BYTE_MODE1
@ CHANNEL_A
Definition: dramc_soc.h:7
@ CHANNEL_B
Definition: dramc_soc.h:8
@ DDR_TYPE_2CH_RK0_RK1_BYTE_8GB_4_4
Definition: dramc_param.h:45
@ DRAMC_PARAM_SOURCE_SDRAM_CONFIG
Definition: emi.h:11
struct sdram_params params
Defines the SDRAM parameter structure.
Definition: emi.h:15
u16 source
Definition: emi.h:16