9 #define MMIO_GROUP0_CHIP0_LPC_BASE_ADDR 0x8006030000000000
10 #define LPCHC_IO_SPACE 0xD0010000
11 #define FLASH_IO_SPACE 0xFC000000
12 #define LPC_BASE_ADDR (MMIO_GROUP0_CHIP0_LPC_BASE_ADDR + LPCHC_IO_SPACE)
13 #define FLASH_BASE_ADDR (MMIO_GROUP0_CHIP0_LPC_BASE_ADDR + FLASH_IO_SPACE)
14 #define MMIO_GROUP0_CHIP0_SCOM_BASE_ADDR 0x800603FC00000000
19 asm volatile(
"eieio" :::
"memory");
static uint8_t inb(uint16_t port)
static void outb(uint8_t value, uint16_t port)
static void outw(uint16_t value, uint16_t port)
static uint32_t inl(uint16_t port)
static uint16_t inw(uint16_t port)
static void outl(uint32_t value, uint16_t port)
static void report_istep(uint8_t step, uint8_t substep)
u8 buffer[C2P_BUFFER_MAXSIZE]