coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
bootblock_common.h
>
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#include <soc/gpio.h>
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#include "
gpio.h
"
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#include <
superio/nuvoton/common/nuvoton.h
>
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#include <
superio/nuvoton/nct6776/nct6776.h
>
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#define SERIAL_DEV PNP_DEV(0x2e, NCT6776_SP1)
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static
void
early_config_gpio
(
void
)
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{
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/* This is a hack for FSP because it does things in MemoryInit()
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* which it shouldn't do. We have to prepare certain gpios here
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* because of the brokenness in FSP. */
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gpio_configure_pads
(
early_gpio_table
,
ARRAY_SIZE
(
early_gpio_table
));
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}
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void
bootblock_mainboard_init
(
void
)
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{
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early_config_gpio
();
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}
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void
bootblock_mainboard_early_init
(
void
)
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{
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nuvoton_enable_serial
(
SERIAL_DEV
, CONFIG_TTYS0_BASE);
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}
early_gpio_table
static const struct pad_config early_gpio_table[]
Definition:
gpio_early.c:7
bootblock_common.h
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
bootblock_mainboard_init
__weak void bootblock_mainboard_init(void)
Definition:
bootblock.c:19
bootblock_mainboard_early_init
__weak void bootblock_mainboard_early_init(void)
Definition:
bootblock.c:16
SERIAL_DEV
#define SERIAL_DEV
Definition:
bootblock.c:10
early_config_gpio
static void early_config_gpio(void)
Definition:
bootblock.c:12
nct6776.h
nuvoton_enable_serial
void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase)
Definition:
early_serial.c:48
nuvoton.h
gpio_configure_pads
void gpio_configure_pads(const struct soc_amd_gpio *gpio_list_ptr, size_t size)
program a particular set of GPIO
Definition:
gpio.c:307
gpio.h
src
mainboard
intel
saddlebrook
bootblock.c
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