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Data Fields
dsi_phy_pll_qlink_regs Struct Reference

#include <mdssreg.h>

Collaboration diagram for dsi_phy_pll_qlink_regs:
Collaboration graph

Data Fields

uint32_t pll_analog_ctrls_one
 
uint32_t pll_analog_ctrls_two
 
uint32_t pll_int_loop_settings
 
uint32_t pll_int_loop_settings_two
 
uint32_t pll_analog_ctrls_three
 
uint32_t pll_analog_ctrls_four
 
uint32_t pll_int_loop_ctrls
 
uint32_t pll_dsm_divider
 
uint32_t pll_feedback_divider
 
uint32_t pll_system_muxes
 
uint32_t pll_freq_update_ctrl_overrides
 
uint32_t pll_cmode
 
uint32_t pll_cal_settings
 
uint32_t pll_band_sel_cal_timer_low
 
uint32_t pll_band_sel_cal_timer_high
 
uint32_t pll_band_sel_cal_settings
 
uint32_t pll_band_sel_min
 
uint32_t pll_band_sel_max
 
uint32_t pll_band_sel_pfilt
 
uint32_t pll_band_sel_ifilt
 
uint32_t pll_band_sel_cal_settings_two
 
uint32_t pll_band_sel_cal_settings_three
 
uint32_t pll_band_sel_cal_settings_four
 
uint32_t pll_band_sel_icode_high
 
uint32_t pll_band_sel_icode_low
 
uint32_t pll_freq_detect_settings_one
 
uint32_t pll_freq_detect_thresh
 
uint32_t pll_freq_det_refclk_high
 
uint32_t pll_freq_det_refclk_low
 
uint32_t pll_freq_det_pllclk_high
 
uint32_t pll_freq_det_pllclk_low
 
uint32_t pll_pfilt
 
uint32_t pll_ifilt
 
uint32_t pll_pll_gain
 
uint32_t pll_icode_low
 
uint32_t pll_icode_high
 
uint32_t pll_lockdet
 
uint32_t pll_outdiv
 
uint32_t pll_fastlock_ctrl
 
uint32_t pll_pass_out_override_one
 
uint32_t pll_pass_out_override_two
 
uint32_t pll_core_override
 
uint32_t pll_core_input_override
 
uint32_t pll_rate_change
 
uint32_t pll_digital_timers
 
uint32_t pll_digital_timers_two
 
uint32_t pll_decimal_div_start
 
uint32_t pll_frac_div_start_low
 
uint32_t pll_frac_div_start_mid
 
uint32_t pll_frac_div_start_high
 
uint32_t pll_dec_frac_muxes
 
uint32_t pll_decimal_div_start_1
 
uint32_t pll_frac_div_start_low1
 
uint32_t pll_frac_div_start_mid1
 
uint32_t pll_frac_div_start_high1
 
uint32_t reserve0 [4]
 
uint32_t pll_mash_ctrl
 
uint32_t reserved1 [6]
 
uint32_t pll_ssc_mux_ctrl
 
uint32_t pll_ssc_stepsize_low1
 
uint32_t pll_ssc_stepsize_high1
 
uint32_t pll_ssc_div_per_low_1
 
uint32_t pll_ssc_div_per_high_1
 
uint32_t pll_ssc_adjper_low_1
 
uint32_t pll_ssc_adjper_high_1
 
uint32_t reserved2 [6]
 
uint32_t pll_ssc_ctrl
 
uint32_t pll_outdiv_rate
 
uint32_t pll_lockdet_rate [2]
 
uint32_t pll_prop_gain_rate [2]
 
uint32_t pll_band_set_rate [2]
 
uint32_t pll_gain_ifilt_band [2]
 
uint32_t pll_fl_int_gain_pfilt_band [2]
 
uint32_t pll_pll_fastlock_en_band
 
uint32_t reserved9 [3]
 
uint32_t pll_freq_tune_accum_init_mux
 
uint32_t pll_lock_override
 
uint32_t pll_lock_delay
 
uint32_t pll_lock_min_delay
 
uint32_t pll_clock_inverters
 
uint32_t pll_spare_and_jpc_overrides
 
uint32_t pll_bias_ctrl_1
 
uint32_t pll_bias_ctrl_2
 
uint32_t pll_alog_obsv_bus_ctrl_1
 
uint32_t pll_common_status_one
 

Detailed Description

Definition at line 125 of file mdssreg.h.

Field Documentation

◆ pll_alog_obsv_bus_ctrl_1

uint32_t dsi_phy_pll_qlink_regs::pll_alog_obsv_bus_ctrl_1

Definition at line 209 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_analog_ctrls_four

uint32_t dsi_phy_pll_qlink_regs::pll_analog_ctrls_four

Definition at line 131 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_analog_ctrls_one

uint32_t dsi_phy_pll_qlink_regs::pll_analog_ctrls_one

Definition at line 126 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_analog_ctrls_three

uint32_t dsi_phy_pll_qlink_regs::pll_analog_ctrls_three

Definition at line 130 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_analog_ctrls_two

uint32_t dsi_phy_pll_qlink_regs::pll_analog_ctrls_two

Definition at line 127 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_band_sel_cal_settings

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_cal_settings

Definition at line 141 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_cal_settings_four

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_cal_settings_four

Definition at line 148 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_cal_settings_three

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_cal_settings_three

Definition at line 147 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_band_sel_cal_settings_two

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_cal_settings_two

Definition at line 146 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_cal_timer_high

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_cal_timer_high

Definition at line 140 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_cal_timer_low

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_cal_timer_low

Definition at line 139 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_icode_high

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_icode_high

Definition at line 149 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_icode_low

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_icode_low

Definition at line 150 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_ifilt

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_ifilt

Definition at line 145 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_max

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_max

Definition at line 143 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_min

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_min

Definition at line 142 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_sel_pfilt

uint32_t dsi_phy_pll_qlink_regs::pll_band_sel_pfilt

Definition at line 144 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_band_set_rate

uint32_t dsi_phy_pll_qlink_regs::pll_band_set_rate[2]

Definition at line 196 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_bias_ctrl_1

uint32_t dsi_phy_pll_qlink_regs::pll_bias_ctrl_1

Definition at line 207 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_bias_ctrl_2

uint32_t dsi_phy_pll_qlink_regs::pll_bias_ctrl_2

Definition at line 208 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_cal_settings

uint32_t dsi_phy_pll_qlink_regs::pll_cal_settings

Definition at line 138 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_clock_inverters

uint32_t dsi_phy_pll_qlink_regs::pll_clock_inverters

Definition at line 205 of file mdssreg.h.

Referenced by dsi_pll_commit().

◆ pll_cmode

uint32_t dsi_phy_pll_qlink_regs::pll_cmode

Definition at line 137 of file mdssreg.h.

Referenced by dsi_pll_commit().

◆ pll_common_status_one

uint32_t dsi_phy_pll_qlink_regs::pll_common_status_one

Definition at line 210 of file mdssreg.h.

◆ pll_core_input_override

uint32_t dsi_phy_pll_qlink_regs::pll_core_input_override

Definition at line 168 of file mdssreg.h.

Referenced by dsi_pll_commit(), and dsi_pll_init_val().

◆ pll_core_override

uint32_t dsi_phy_pll_qlink_regs::pll_core_override

Definition at line 167 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_dec_frac_muxes

uint32_t dsi_phy_pll_qlink_regs::pll_dec_frac_muxes

Definition at line 176 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_decimal_div_start

uint32_t dsi_phy_pll_qlink_regs::pll_decimal_div_start

Definition at line 172 of file mdssreg.h.

◆ pll_decimal_div_start_1

uint32_t dsi_phy_pll_qlink_regs::pll_decimal_div_start_1

Definition at line 177 of file mdssreg.h.

Referenced by dsi_pll_commit().

◆ pll_digital_timers

uint32_t dsi_phy_pll_qlink_regs::pll_digital_timers

Definition at line 170 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_digital_timers_two

uint32_t dsi_phy_pll_qlink_regs::pll_digital_timers_two

Definition at line 171 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_dsm_divider

uint32_t dsi_phy_pll_qlink_regs::pll_dsm_divider

Definition at line 133 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_fastlock_ctrl

uint32_t dsi_phy_pll_qlink_regs::pll_fastlock_ctrl

Definition at line 164 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_feedback_divider

uint32_t dsi_phy_pll_qlink_regs::pll_feedback_divider

Definition at line 134 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_fl_int_gain_pfilt_band

uint32_t dsi_phy_pll_qlink_regs::pll_fl_int_gain_pfilt_band[2]

Definition at line 198 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_frac_div_start_high

uint32_t dsi_phy_pll_qlink_regs::pll_frac_div_start_high

Definition at line 175 of file mdssreg.h.

◆ pll_frac_div_start_high1

uint32_t dsi_phy_pll_qlink_regs::pll_frac_div_start_high1

Definition at line 180 of file mdssreg.h.

Referenced by dsi_pll_commit().

◆ pll_frac_div_start_low

uint32_t dsi_phy_pll_qlink_regs::pll_frac_div_start_low

Definition at line 173 of file mdssreg.h.

◆ pll_frac_div_start_low1

uint32_t dsi_phy_pll_qlink_regs::pll_frac_div_start_low1

Definition at line 178 of file mdssreg.h.

Referenced by dsi_pll_commit().

◆ pll_frac_div_start_mid

uint32_t dsi_phy_pll_qlink_regs::pll_frac_div_start_mid

Definition at line 174 of file mdssreg.h.

◆ pll_frac_div_start_mid1

uint32_t dsi_phy_pll_qlink_regs::pll_frac_div_start_mid1

Definition at line 179 of file mdssreg.h.

Referenced by dsi_pll_commit().

◆ pll_freq_det_pllclk_high

uint32_t dsi_phy_pll_qlink_regs::pll_freq_det_pllclk_high

Definition at line 155 of file mdssreg.h.

◆ pll_freq_det_pllclk_low

uint32_t dsi_phy_pll_qlink_regs::pll_freq_det_pllclk_low

Definition at line 156 of file mdssreg.h.

◆ pll_freq_det_refclk_high

uint32_t dsi_phy_pll_qlink_regs::pll_freq_det_refclk_high

Definition at line 153 of file mdssreg.h.

◆ pll_freq_det_refclk_low

uint32_t dsi_phy_pll_qlink_regs::pll_freq_det_refclk_low

Definition at line 154 of file mdssreg.h.

◆ pll_freq_detect_settings_one

uint32_t dsi_phy_pll_qlink_regs::pll_freq_detect_settings_one

Definition at line 151 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_freq_detect_thresh

uint32_t dsi_phy_pll_qlink_regs::pll_freq_detect_thresh

Definition at line 152 of file mdssreg.h.

◆ pll_freq_tune_accum_init_mux

uint32_t dsi_phy_pll_qlink_regs::pll_freq_tune_accum_init_mux

Definition at line 201 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_freq_update_ctrl_overrides

uint32_t dsi_phy_pll_qlink_regs::pll_freq_update_ctrl_overrides

Definition at line 136 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_gain_ifilt_band

uint32_t dsi_phy_pll_qlink_regs::pll_gain_ifilt_band[2]

Definition at line 197 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_icode_high

uint32_t dsi_phy_pll_qlink_regs::pll_icode_high

Definition at line 161 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_icode_low

uint32_t dsi_phy_pll_qlink_regs::pll_icode_low

Definition at line 160 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_ifilt

uint32_t dsi_phy_pll_qlink_regs::pll_ifilt

Definition at line 158 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_int_loop_ctrls

uint32_t dsi_phy_pll_qlink_regs::pll_int_loop_ctrls

Definition at line 132 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_int_loop_settings

uint32_t dsi_phy_pll_qlink_regs::pll_int_loop_settings

Definition at line 128 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_int_loop_settings_two

uint32_t dsi_phy_pll_qlink_regs::pll_int_loop_settings_two

Definition at line 129 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_lock_delay

uint32_t dsi_phy_pll_qlink_regs::pll_lock_delay

Definition at line 203 of file mdssreg.h.

Referenced by dsi_pll_commit().

◆ pll_lock_min_delay

uint32_t dsi_phy_pll_qlink_regs::pll_lock_min_delay

Definition at line 204 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_lock_override

uint32_t dsi_phy_pll_qlink_regs::pll_lock_override

Definition at line 202 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_lockdet

uint32_t dsi_phy_pll_qlink_regs::pll_lockdet

Definition at line 162 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_lockdet_rate

uint32_t dsi_phy_pll_qlink_regs::pll_lockdet_rate[2]

Definition at line 194 of file mdssreg.h.

Referenced by dsi_pll_commit().

◆ pll_mash_ctrl

uint32_t dsi_phy_pll_qlink_regs::pll_mash_ctrl

Definition at line 182 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_outdiv

uint32_t dsi_phy_pll_qlink_regs::pll_outdiv

Definition at line 163 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_outdiv_rate

uint32_t dsi_phy_pll_qlink_regs::pll_outdiv_rate

Definition at line 193 of file mdssreg.h.

Referenced by dsi_phy_pll_calcandcommit().

◆ pll_pass_out_override_one

uint32_t dsi_phy_pll_qlink_regs::pll_pass_out_override_one

Definition at line 165 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_pass_out_override_two

uint32_t dsi_phy_pll_qlink_regs::pll_pass_out_override_two

Definition at line 166 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_pfilt

uint32_t dsi_phy_pll_qlink_regs::pll_pfilt

Definition at line 157 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_pll_fastlock_en_band

uint32_t dsi_phy_pll_qlink_regs::pll_pll_fastlock_en_band

Definition at line 199 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_pll_gain

uint32_t dsi_phy_pll_qlink_regs::pll_pll_gain

Definition at line 159 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_prop_gain_rate

uint32_t dsi_phy_pll_qlink_regs::pll_prop_gain_rate[2]

Definition at line 195 of file mdssreg.h.

Referenced by dsi_pll_config_hzindep_reg().

◆ pll_rate_change

uint32_t dsi_phy_pll_qlink_regs::pll_rate_change

Definition at line 169 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_spare_and_jpc_overrides

uint32_t dsi_phy_pll_qlink_regs::pll_spare_and_jpc_overrides

Definition at line 206 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_ssc_adjper_high_1

uint32_t dsi_phy_pll_qlink_regs::pll_ssc_adjper_high_1

Definition at line 190 of file mdssreg.h.

◆ pll_ssc_adjper_low_1

uint32_t dsi_phy_pll_qlink_regs::pll_ssc_adjper_low_1

Definition at line 189 of file mdssreg.h.

◆ pll_ssc_ctrl

uint32_t dsi_phy_pll_qlink_regs::pll_ssc_ctrl

Definition at line 192 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_ssc_div_per_high_1

uint32_t dsi_phy_pll_qlink_regs::pll_ssc_div_per_high_1

Definition at line 188 of file mdssreg.h.

◆ pll_ssc_div_per_low_1

uint32_t dsi_phy_pll_qlink_regs::pll_ssc_div_per_low_1

Definition at line 187 of file mdssreg.h.

◆ pll_ssc_mux_ctrl

uint32_t dsi_phy_pll_qlink_regs::pll_ssc_mux_ctrl

Definition at line 184 of file mdssreg.h.

Referenced by dsi_pll_init_val().

◆ pll_ssc_stepsize_high1

uint32_t dsi_phy_pll_qlink_regs::pll_ssc_stepsize_high1

Definition at line 186 of file mdssreg.h.

◆ pll_ssc_stepsize_low1

uint32_t dsi_phy_pll_qlink_regs::pll_ssc_stepsize_low1

Definition at line 185 of file mdssreg.h.

◆ pll_system_muxes

uint32_t dsi_phy_pll_qlink_regs::pll_system_muxes

Definition at line 135 of file mdssreg.h.

Referenced by dsi_phy_pll_bias_enable().

◆ reserve0

uint32_t dsi_phy_pll_qlink_regs::reserve0[4]

Definition at line 181 of file mdssreg.h.

◆ reserved1

uint32_t dsi_phy_pll_qlink_regs::reserved1[6]

Definition at line 183 of file mdssreg.h.

◆ reserved2

uint32_t dsi_phy_pll_qlink_regs::reserved2[6]

Definition at line 191 of file mdssreg.h.

◆ reserved9

uint32_t dsi_phy_pll_qlink_regs::reserved9[3]

Definition at line 200 of file mdssreg.h.

The documentation for this struct was generated from the following file: