coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
nct7802y_peci.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <types.h>
4 #include <device/device.h>
5 
6 #include "nct7802y.h"
7 #include "chip.h"
8 
9 void nct7802y_init_peci(struct device *const dev)
10 {
11  const struct drivers_i2c_nct7802y_config *const config = dev->chip_info;
12  unsigned int i, all_off = 1;
13 
14  /* Bank 1 can only be written to if PECI reading is enabled */
15  if (nct7802y_select_bank(dev, 0) != CB_SUCCESS)
16  return;
18 
19  if (nct7802y_select_bank(dev, 1) != CB_SUCCESS)
20  return;
21 
22  for (i = 0; i < NCT7802Y_PECI_CNT; ++i) {
23  if (config->peci[i].mode != PECI_DISABLED) {
24  u8 ctrl3 = 0, style = 0;
25  switch (config->peci[i].mode) {
26  case PECI_DOMAIN_0:
27  ctrl3 = PECI_CTRL_3_EN_AGENTx(i);
28  style = PECI_TEMP_STYLE_DOM0_AGENTx(i) |
30  break;
31  case PECI_DOMAIN_1:
32  ctrl3 = PECI_CTRL_3_EN_AGENTx(i) |
34  style = PECI_TEMP_STYLE_DOM1_AGENTx(i) |
36  break;
37  case PECI_HIGHEST:
38  ctrl3 = PECI_CTRL_3_EN_AGENTx(i) |
41  break;
42  default:
43  break;
44  }
50  PECI_CTRL_3_HAS_DOM1_AGENTx(i), ctrl3);
54  style);
56  config->peci[i].base_temp);
57  all_off = 0;
58  } else {
60  PECI_CTRL_3_EN_AGENTx(i), 0);
61  }
62  }
63 
64  if (all_off)
66 
67  /* Disable PECI #0 reading if we only enabled it to access bank 1 */
68  if (config->peci[0].mode == PECI_DISABLED) {
69  if (nct7802y_select_bank(dev, 0) != CB_SUCCESS)
70  return;
71 
73  }
74 }
@ CB_SUCCESS
Call completed successfully.
Definition: cb_err.h:16
@ PECI_DOMAIN_1
Definition: chip.h:23
@ PECI_HIGHEST
Definition: chip.h:24
@ PECI_DISABLED
Definition: chip.h:21
@ PECI_DOMAIN_0
Definition: chip.h:22
#define NCT7802Y_PECI_CNT
Definition: chip.h:8
enum board_config config
Definition: memory.c:448
static int nct7802y_update(struct device *const dev, const u8 reg, const u8 clear_mask, const u8 set_mask)
Definition: nct7802y.h:82
#define PECI_REPORT_TEMP_STYLE
Definition: nct7802y.h:59
#define PECI_ENABLE_AGENTx(x)
Definition: nct7802y.h:19
#define PECI_CTRL_1_ROUTINE_EN
Definition: nct7802y.h:53
#define PECI_CTRL_1_EN
Definition: nct7802y.h:51
#define PECI_TEMP_STYLE_DOM0_AGENTx(x)
Definition: nct7802y.h:60
#define PECI_CTRL_3
Definition: nct7802y.h:55
#define PECI_TEMP_STYLE_SINGLE
Definition: nct7802y.h:62
#define PECI_TEMP_STYLE_HIGHEST
Definition: nct7802y.h:63
#define PECI_CTRL_1
Definition: nct7802y.h:50
static int nct7802y_write(struct device *const dev, const u8 reg, const u8 value)
Definition: nct7802y.h:76
#define PECI_TEMP_STYLE_DOM1_AGENTx(x)
Definition: nct7802y.h:61
#define PECI_CTRL_3_HAS_DOM1_AGENTx(x)
Definition: nct7802y.h:57
#define PECI_CTRL_1_MANUAL_EN
Definition: nct7802y.h:52
static int nct7802y_select_bank(struct device *const dev, const u8 bank)
Definition: nct7802y.h:68
#define PECI_BASE_TEMP_AGENT(x)
Definition: nct7802y.h:65
#define PECI_CTRL_3_EN_AGENTx(x)
Definition: nct7802y.h:56
#define PECI_ENABLE
Definition: nct7802y.h:18
void nct7802y_init_peci(struct device *const dev)
Definition: nct7802y_peci.c:9
uint8_t u8
Definition: stdint.h:45
Definition: device.h:107
DEVTREE_CONST void * chip_info
Definition: device.h:164