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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Functions | |
void | clear_smi_and_wake_events (void) |
void | disable_rom_shadow (void) |
void * | locate_rmu_file (size_t *rmu_file_len) |
void | report_platform_info (void) |
int | set_base_address_and_enable_uart (u8 bus, u8 dev, u8 func, u32 mmio_base) |
void | pcie_init (void) |
Definition at line 20 of file romstage.c.
References BIOS_SPEW, clear_smi_and_wake_events_script, get_power_state(), LPC_BDF, chipset_power_state::prev_sleep_state, printk, and reg_script_run_on_dev().
Referenced by platform_fsp_memory_init_params_cb().
Definition at line 33 of file romstage.c.
References ESEG_RD_DRAM, FSEG_RD_DRAM, port_reg_read(), port_reg_write(), QNC_MSG_FSBIC_REG_HMISC, and QUARK_NC_HOST_BRIDGE_SB_PORT_ID.
Referenced by mainboard_romstage_entry().
Definition at line 50 of file romstage.c.
References cbfs_ro_map(), and NULL.
Referenced by platform_fsp_memory_init_params_cb().
Definition at line 84 of file pcie.c.
References pcie_bus_init_script, pcie_init_script, PCIE_PORT0_BDF, PCIE_PORT1_BDF, reg_script_run(), and reg_script_run_on_dev().
Definition at line 92 of file report_platform.c.