addressmap.h File Reference

#include <stddef.h>
#include <stdint.h>

Include dependency graph for addressmap.h:

Go to the source code of this file.

Macros
#define	GPU_CARVEOUT_SIZE_MB   1
#define	NVDEC_CARVEOUT_SIZE_MB   1
#define	TSEC_CARVEOUT_SIZE_MB   2
#define	VPR_CARVEOUT_SIZE_MB   128

Enumerations
enum	{ TEGRA_SRAM_BASE = 0x40000000 , TEGRA_SRAM_SIZE = 0x40000 }
enum	{   TEGRA_ARM_PCIE_A1_BASE = 0x01000000 , TEGRA_ARM_LOWEST_PERIPH = TEGRA_ARM_PCIE_A1_BASE , TEGRA_ARM_PERIPHBASE = 0x50040000 , TEGRA_GICD_BASE = 0x50041000 ,   TEGRA_GICC_BASE = 0x50042000 , TEGRA_MSELECT_CONFIG = 0x50060000 , TEGRA_ARM_DISPLAYA = 0x54200000 , TEGRA_ARM_DISPLAYB = 0x54240000 ,   TEGRA_DSIA_BASE = 0x54300000 , TEGRA_DSIB_BASE = 0x54400000 , TEGRA_ARM_SOR = 0x54540000 , TEGRA_ARM_DPAUX = 0x545c0000 ,   TEGRA_PG_UP_BASE = 0x60000000 , TEGRA_TMRUS_BASE = 0x60005010 , TEGRA_CLK_RST_BASE = 0x60006000 , TEGRA_FLOW_BASE = 0x60007000 ,   TEGRA_SB_BASE = 0x6000C200 , TEGRA_GPIO_BASE = 0x6000D000 , TEGRA_EVP_BASE = 0x6000F000 , TEGRA_APB_DMA_BASE = 0x60020000 ,   TEGRA_APB_MISC_BASE = 0x70000000 , TEGRA_APB_MISC_GP_BASE = TEGRA_APB_MISC_BASE + 0x0800 , TEGRA_APB_PINGROUP_BASE = TEGRA_APB_MISC_BASE + 0x0868 , TEGRA_APB_PINMUX_BASE = TEGRA_APB_MISC_BASE + 0x3000 ,   TEGRA_APB_UARTA_BASE = TEGRA_APB_MISC_BASE + 0x6000 , TEGRA_APB_UARTB_BASE = TEGRA_APB_MISC_BASE + 0x6040 , TEGRA_APB_UARTC_BASE = TEGRA_APB_MISC_BASE + 0x6200 , TEGRA_APB_UARTD_BASE = TEGRA_APB_MISC_BASE + 0x6300 ,   TEGRA_APB_UARTE_BASE = TEGRA_APB_MISC_BASE + 0x6400 , TEGRA_NAND_BASE = TEGRA_APB_MISC_BASE + 0x8000 , TEGRA_PWM_BASE = TEGRA_APB_MISC_BASE + 0xA000 , TEGRA_I2C1_BASE = TEGRA_APB_MISC_BASE + 0xC000 ,   TEGRA_SPI_BASE = TEGRA_APB_MISC_BASE + 0xC380 , TEGRA_I2C2_BASE = TEGRA_APB_MISC_BASE + 0xC400 , TEGRA_I2C3_BASE = TEGRA_APB_MISC_BASE + 0xC500 , TEGRA_I2C4_BASE = TEGRA_APB_MISC_BASE + 0xC700 ,   TEGRA_I2C5_BASE = TEGRA_APB_MISC_BASE + 0xD000 , TEGRA_I2C6_BASE = TEGRA_APB_MISC_BASE + 0xD100 , TEGRA_SPI1_BASE = TEGRA_APB_MISC_BASE + 0xD400 , TEGRA_SPI2_BASE = TEGRA_APB_MISC_BASE + 0xD600 ,   TEGRA_SPI3_BASE = TEGRA_APB_MISC_BASE + 0xD800 , TEGRA_SPI4_BASE = TEGRA_APB_MISC_BASE + 0xDA00 , TEGRA_SPI5_BASE = TEGRA_APB_MISC_BASE + 0xDC00 , TEGRA_SPI6_BASE = TEGRA_APB_MISC_BASE + 0xDE00 ,   TEGRA_SBC1_BASE = TEGRA_SPI1_BASE , TEGRA_SBC2_BASE = TEGRA_SPI2_BASE , TEGRA_SBC3_BASE = TEGRA_SPI3_BASE , TEGRA_SBC4_BASE = TEGRA_SPI4_BASE ,   TEGRA_SBC5_BASE = TEGRA_SPI5_BASE , TEGRA_SBC6_BASE = TEGRA_SPI6_BASE , TEGRA_PMC_BASE = TEGRA_APB_MISC_BASE + 0xE400 , TEGRA_FUSE_BASE = TEGRA_APB_MISC_BASE + 0xF800 ,   TEGRA_MC_BASE = 0x70019000 , TEGRA_EMC_BASE = 0x7001B000 , TEGRA_CLUSTER_CLOCK_BASE = 0x70040000 , TEGRA_QSPI_BASE = 0x70410000 ,   TEGRA_CSITE_BASE = 0x70800000 , TEGRA_SDMMC_BASE = 0x700b0000 , TEGRA_SDMMC1_BASE = TEGRA_SDMMC_BASE + 0x0000 , TEGRA_SDMMC2_BASE = TEGRA_SDMMC_BASE + 0x0200 ,   TEGRA_SDMMC3_BASE = TEGRA_SDMMC_BASE + 0x0400 , TEGRA_SDMMC4_BASE = TEGRA_SDMMC_BASE + 0x0600 , TEGRA_MIPI_CAL_BASE = 0x700E3000 , TEGRA_SYSCTR0_BASE = 0x700F0000 ,   TEGRA_I2S1_BASE = 0x70301100 , TEGRA_USBD_BASE = 0x7D000000 , TEGRA_USB2_BASE = 0x7D004000 , TEGRA_USB3_BASE = 0x7D008000 }
enum	{ TEGRA_I2C_BASE_COUNT = 6 }
enum	{   CARVEOUT_TZ , CARVEOUT_SEC , CARVEOUT_MTS , CARVEOUT_VPR ,   CARVEOUT_GPU , CARVEOUT_NVDEC , CARVEOUT_TSEC , CARVEOUT_NUM }

Functions
int	sdram_size_mb (void)
void	memory_in_range_below_4gb (uintptr_t *base_mib, uintptr_t *end_mib)
void	memory_in_range_above_4gb (uintptr_t *base_mib, uintptr_t *end_mib)
void	carveout_range (int id, uintptr_t *base_mib, size_t *size_mib)
void	print_carveouts (void)
void	trustzone_region_init (void)
void	gpu_region_init (void)
void	nvdec_region_init (void)
void	tsec_region_init (void)
void	vpr_region_init (void)

Macro Definition Documentation

GPU_CARVEOUT_SIZE_MB

#define GPU_CARVEOUT_SIZE_MB   1

Definition at line 89 of file addressmap.h.

NVDEC_CARVEOUT_SIZE_MB

#define NVDEC_CARVEOUT_SIZE_MB   1

Definition at line 90 of file addressmap.h.

TSEC_CARVEOUT_SIZE_MB

#define TSEC_CARVEOUT_SIZE_MB   2

Definition at line 91 of file addressmap.h.

VPR_CARVEOUT_SIZE_MB

#define VPR_CARVEOUT_SIZE_MB   128

Definition at line 92 of file addressmap.h.

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
TEGRA_SRAM_BASE
TEGRA_SRAM_SIZE

Definition at line 9 of file addressmap.h.

anonymous enum

anonymous enum

Enumerator
TEGRA_ARM_PCIE_A1_BASE
TEGRA_ARM_LOWEST_PERIPH
TEGRA_ARM_PERIPHBASE
TEGRA_GICD_BASE
TEGRA_GICC_BASE
TEGRA_MSELECT_CONFIG
TEGRA_ARM_DISPLAYA
TEGRA_ARM_DISPLAYB
TEGRA_DSIA_BASE
TEGRA_DSIB_BASE
TEGRA_ARM_SOR
TEGRA_ARM_DPAUX
TEGRA_PG_UP_BASE
TEGRA_TMRUS_BASE
TEGRA_CLK_RST_BASE
TEGRA_FLOW_BASE
TEGRA_SB_BASE
TEGRA_GPIO_BASE
TEGRA_EVP_BASE
TEGRA_APB_DMA_BASE
TEGRA_APB_MISC_BASE
TEGRA_APB_MISC_GP_BASE
TEGRA_APB_PINGROUP_BASE
TEGRA_APB_PINMUX_BASE
TEGRA_APB_UARTA_BASE
TEGRA_APB_UARTB_BASE
TEGRA_APB_UARTC_BASE
TEGRA_APB_UARTD_BASE
TEGRA_APB_UARTE_BASE
TEGRA_NAND_BASE
TEGRA_PWM_BASE
TEGRA_I2C1_BASE
TEGRA_SPI_BASE
TEGRA_I2C2_BASE
TEGRA_I2C3_BASE
TEGRA_I2C4_BASE
TEGRA_I2C5_BASE
TEGRA_I2C6_BASE
TEGRA_SPI1_BASE
TEGRA_SPI2_BASE
TEGRA_SPI3_BASE
TEGRA_SPI4_BASE
TEGRA_SPI5_BASE
TEGRA_SPI6_BASE
TEGRA_SBC1_BASE
TEGRA_SBC2_BASE
TEGRA_SBC3_BASE
TEGRA_SBC4_BASE
TEGRA_SBC5_BASE
TEGRA_SBC6_BASE
TEGRA_PMC_BASE
TEGRA_FUSE_BASE
TEGRA_MC_BASE
TEGRA_EMC_BASE
TEGRA_CLUSTER_CLOCK_BASE
TEGRA_QSPI_BASE
TEGRA_CSITE_BASE
TEGRA_SDMMC_BASE
TEGRA_SDMMC1_BASE
TEGRA_SDMMC2_BASE
TEGRA_SDMMC3_BASE
TEGRA_SDMMC4_BASE
TEGRA_MIPI_CAL_BASE
TEGRA_SYSCTR0_BASE
TEGRA_I2S1_BASE
TEGRA_USBD_BASE
TEGRA_USB2_BASE
TEGRA_USB3_BASE

Definition at line 14 of file addressmap.h.

anonymous enum

anonymous enum

Enumerator
TEGRA_I2C_BASE_COUNT

Definition at line 85 of file addressmap.h.

anonymous enum

anonymous enum

Enumerator
CARVEOUT_TZ
CARVEOUT_SEC
CARVEOUT_MTS
CARVEOUT_VPR
CARVEOUT_GPU
CARVEOUT_NVDEC
CARVEOUT_TSEC
CARVEOUT_NUM

Definition at line 101 of file addressmap.h.

Function Documentation

carveout_range()

void carveout_range	(	int	id,
		uintptr_t *	base_mib,
		size_t *	size_mib
	)

Definition at line 53 of file addressmap.c.

References carveout_from_regs(), CARVEOUT_GPU, CARVEOUT_MTS, CARVEOUT_NVDEC, CARVEOUT_SEC, CARVEOUT_TSEC, CARVEOUT_TZ, CARVEOUT_VPR, DIV_ROUND_UP, tegra_mc_regs::mts_carveout_adr_hi, tegra_mc_regs::mts_carveout_bom, tegra_mc_regs::mts_carveout_size_mb, read32(), tegra_mc_regs::sec_carveout_adr_hi, tegra_mc_regs::sec_carveout_bom, tegra_mc_regs::sec_carveout_size_mb, tegra_mc_regs::security_carveout1_bom, tegra_mc_regs::security_carveout1_bom_hi, tegra_mc_regs::security_carveout1_size_128kb, tegra_mc_regs::security_carveout2_bom, tegra_mc_regs::security_carveout2_bom_hi, tegra_mc_regs::security_carveout2_size_128kb, tegra_mc_regs::security_carveout4_bom, tegra_mc_regs::security_carveout4_bom_hi, tegra_mc_regs::security_carveout4_size_128kb, TEGRA_MC_BASE, tz_base_mib, tz_size_mib, tegra_mc_regs::video_protect_bom, tegra_mc_regs::video_protect_bom_adr_hi, and tegra_mc_regs::video_protect_size_mb.

Referenced by bootmem_platform_add_ranges(), memory_in_range(), print_carveouts(), soc_get_bl31_plat_params(), tegra210_mmu_config(), and tegra210_mmu_init().

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gpu_region_init()

void gpu_region_init

(

void

)

Definition at line 272 of file addressmap.c.

References CARVEOUT_GPU, GPU_CARVEOUT_SIZE_MB, MC_SECURITY_CARVEOUT_LOCKED, memory_in_range(), tegra_mc_regs::security_carveout2_bom, tegra_mc_regs::security_carveout2_bom_hi, tegra_mc_regs::security_carveout2_cfg0, tegra_mc_regs::security_carveout3_bom, tegra_mc_regs::security_carveout3_bom_hi, tegra_mc_regs::security_carveout3_cfg0, setbits32, TEGRA_MC_BASE, and write32().

Referenced by romstage().

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memory_in_range_above_4gb()

void memory_in_range_above_4gb	(	uintptr_t *	base_mib,
		uintptr_t *	end_mib
	)

Definition at line 226 of file addressmap.c.

References CARVEOUT_NUM, and memory_in_range().

Referenced by tegra210_mmu_config().

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memory_in_range_below_4gb()

void memory_in_range_below_4gb	(	uintptr_t *	base_mib,
		uintptr_t *	end_mib
	)

Definition at line 219 of file addressmap.c.

References CARVEOUT_NUM, and memory_in_range().

Referenced by cbmem_top_chipset(), and tegra210_mmu_config().

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nvdec_region_init()

void nvdec_region_init

(

void

)

Definition at line 297 of file addressmap.c.

References CARVEOUT_NVDEC, MC_SECURITY_CARVEOUT_LOCKED, memory_in_range(), NVDEC_CARVEOUT_SIZE_MB, tegra_mc_regs::security_carveout1_bom, tegra_mc_regs::security_carveout1_bom_hi, tegra_mc_regs::security_carveout1_cfg0, setbits32, TEGRA_MC_BASE, and write32().

Referenced by romstage().

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print_carveouts()

void print_carveouts

(

void

)

Definition at line 127 of file addressmap.c.

References base, BIOS_INFO, CARVEOUT_NUM, carveout_range(), MiB, and printk.

Referenced by tegra210_mmu_config().

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sdram_size_mb()

int sdram_size_mb

(

void

)

Definition at line 24 of file sdram.c.

trustzone_region_init()

void trustzone_region_init

(

void

)

Definition at line 233 of file addressmap.c.

References assert, CARVEOUT_TZ, context_avp(), MC_SMMU_CONFIG_ENABLE, memory_in_range(), tegra_mc_regs::security_cfg0, tegra_mc_regs::security_cfg1, tegra_mc_regs::smmu_config, TEGRA_MC_BASE, tz_base_mib, tz_size_mib, and write32().

Referenced by ramstage_entry(), and romstage().

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tsec_region_init()

void tsec_region_init

(

void

)

Definition at line 315 of file addressmap.c.

References CARVEOUT_TSEC, MC_SECURITY_CARVEOUT_LOCKED, memory_in_range(), tegra_mc_regs::security_carveout4_bom, tegra_mc_regs::security_carveout4_bom_hi, tegra_mc_regs::security_carveout4_cfg0, tegra_mc_regs::security_carveout5_bom, tegra_mc_regs::security_carveout5_bom_hi, tegra_mc_regs::security_carveout5_cfg0, setbits32, TEGRA_MC_BASE, TSEC_CARVEOUT_SIZE_MB, and write32().

Referenced by romstage().

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vpr_region_init()

void vpr_region_init

(

void

)

Definition at line 339 of file addressmap.c.

References CARVEOUT_VPR, MC_VPR_WR_ACCESS_DISABLE, memory_in_range(), TEGRA_MC_BASE, tegra_mc_regs::video_protect_bom, tegra_mc_regs::video_protect_bom_adr_hi, tegra_mc_regs::video_protect_reg_ctrl, tegra_mc_regs::video_protect_size_mb, VPR_CARVEOUT_SIZE_MB, and write32().

Referenced by romstage().

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