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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <delay.h>
#include <device/mmio.h>
#include <arch/lib_helpers.h>
#include <console/console.h>
#include <soc/clock.h>
#include <soc/timer.h>
#include <stdint.h>
#include <timer.h>
#include <soc/addressmap.h>
#include <assert.h>
Go to the source code of this file.
Data Structures | |
struct | cn81xx_timer |
Macros | |
#define | GTI_CC_CNTCR_EN (1 << 0) |
#define | GTI_CC_CNTCR_HDBG (1 << 1) |
#define | GTI_CC_CNTCR_FCREQ (1 << 8) |
#define | GTI_CC_CNTSR_DBGH (1 << 1) |
#define | GTI_CC_CNTSR_FCACK (1 << 8) |
#define | GTI_CWD_WDOG_MODE_SHIFT 0 |
#define | GTI_CWD_WDOG_MODE_MASK 0x3 |
#define | GTI_CWD_WDOG_STATE_SHIFT 2 |
#define | GTI_CWD_WDOG_STATE_MASK 0x3 |
#define | GTI_CWD_WDOG_LEN_SHIFT 4 |
#define | GTI_CWD_WDOG_LEN_MASK 0xffff |
#define | GTI_CWD_WDOG_CNT_SHIFT 20 |
#define | GTI_CWD_WDOG_CNT_MASK 0xffffff |
#define | GTI_CWD_WDOC_DSTOP (1 << 44) |
#define | GTI_CWD_WDOC_GSTOP (1 << 45) |
Functions | |
check_member (cn81xx_timer, cc_imp_ctl, 0x100) | |
check_member (cn81xx_timer, ctl_cntacr0, 0x20040) | |
check_member (cn81xx_timer, cwd_wdog[0], 0x40000) | |
check_member (cn81xx_timer, cwd_poke[0], 0x50000) | |
static uint64_t | timer_raw_value (void) |
void | timer_monotonic_get (struct mono_time *mt) |
Get GTI counter value. More... | |
void | init_timer (void) |
Init Global System Timers Unit (GTI). More... | |
void | soc_timer_init (void) |
void | watchdog_set (const size_t index, unsigned int timeout_ms) |
Setup the watchdog to expire in timeout_ms milliseconds. More... | |
void | watchdog_poke (const size_t index) |
Signal the watchdog that we are still running. More... | |
void | watchdog_disable (const size_t index) |
Disable the hardware watchdog. More... | |
int | watchdog_is_running (const size_t index) |
Return true if the watchdog is configured and running. More... | |
Variables | |
static const size_t | tickrate = 1000000 |
check_member | ( | cn81xx_timer | , |
cc_imp_ctl | , | ||
0x100 | |||
) |
check_member | ( | cn81xx_timer | , |
ctl_cntacr0 | , | ||
0x20040 | |||
) |
check_member | ( | cn81xx_timer | , |
cwd_poke | [0], | ||
0x50000 | |||
) |
check_member | ( | cn81xx_timer | , |
cwd_wdog | [0], | ||
0x40000 | |||
) |
Init Global System Timers Unit (GTI).
Configure timer to run at 1MHz tick-rate.
Definition at line 95 of file timer.c.
References cn81xx_timer::cc_cntcr, cn81xx_timer::cc_cntfid0, cn81xx_timer::cc_cntrate, cn81xx_timer::cc_imp_ctl, cn81xx_timer::ctl_cntfrq, GTI_CC_CNTCR_EN, GTI_PF_BAR0, setbits32, thunderx_get_io_clock(), tickrate, and write32().
Definition at line 119 of file timer.c.
References tickrate.
Referenced by mainboard_init().
Get GTI counter value.
mt | Structure to fill |
Definition at line 83 of file timer.c.
References mono_time_set_usecs(), and timer_raw_value().
Definition at line 72 of file timer.c.
References cn81xx_timer::cc_cntcv, GTI_PF_BAR0, and read64().
Referenced by timer_monotonic_get().
Disable the hardware watchdog.
index | Index of watchdog to configure. |
Definition at line 190 of file timer.c.
References ARRAY_SIZE, assert, BIOS_DEBUG, cn81xx_timer::cwd_wdog, GTI_PF_BAR0, printk, and write64().
Referenced by bdk_watchdog_disable(), and soc_final().
int watchdog_is_running | ( | const size_t | index | ) |
Return true if the watchdog is configured and running.
index | Index of watchdog to configure. |
Definition at line 209 of file timer.c.
References ARRAY_SIZE, assert, cn81xx_timer::cwd_wdog, GTI_CWD_WDOG_MODE_MASK, GTI_CWD_WDOG_MODE_SHIFT, GTI_PF_BAR0, read64(), and val.
Referenced by bdk_watchdog_is_running().
Signal the watchdog that we are still running.
index | Index of watchdog to configure. |
Definition at line 174 of file timer.c.
References ARRAY_SIZE, assert, cn81xx_timer::cwd_poke, GTI_PF_BAR0, and write64().
Referenced by bdk_watchdog_poke(), bootblock_soc_init(), and platform_romstage_main().
Setup the watchdog to expire in timeout_ms milliseconds.
When the watchdog expires, the chip three things happen: 1) Expire 1: interrupt that is ignored by the BDK 2) Expire 2: DEL3T interrupt, which is disabled and ignored 3) Expire 3: Soft reset of the chip
Since we want a soft reset, we actually program the watchdog to expire at the timeout / 3.
index | Index of watchdog to configure |
timeout_ms | Timeout in milliseconds. |
Definition at line 137 of file timer.c.
References ARRAY_SIZE, assert, BIOS_DEBUG, clrsetbits64, cn81xx_timer::cwd_wdog, GTI_CWD_WDOG_LEN_MASK, GTI_CWD_WDOG_LEN_SHIFT, GTI_CWD_WDOG_MODE_MASK, GTI_CWD_WDOG_MODE_SHIFT, GTI_PF_BAR0, printk, and thunderx_get_io_clock().
Referenced by bdk_watchdog_set(), and bootblock_soc_init().
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static |
Definition at line 89 of file timer.c.
Referenced by init_timer(), and soc_timer_init().