coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
Data Structures | Macros | Functions
pl011.h File Reference
#include <types.h>
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Data Structures

struct  pl011_uart
 

Macros

#define PL011_UARTFR_RI   (1 << 8) /* Ring indicator */
 
#define PL011_UARTFR_TXFE   (1 << 7) /* Transmit FIFO empty */
 
#define PL011_UARTFR_RXFF   (1 << 6) /* Receive FIFO full */
 
#define PL011_UARTFR_TXFF   (1 << 5) /* Transmit FIFO full */
 
#define PL011_UARTFR_RXFE   (1 << 4) /* Receive FIFO empty */
 
#define PL011_UARTFR_BUSY   (1 << 3) /* UART busy */
 
#define PL011_UARTFR_DCD   (1 << 2) /* Data carrier detect */
 
#define PL011_UARTFR_DSR   (1 << 1) /* Data set ready */
 
#define PL011_UARTFR_CTS   (1 << 0) /* Clear to send */
 
#define PL011_UARTFR_TXFF_BIT
 
#define PL011_UARTFR_RXFE_BIT
 
#define PL011_UARTFR_BUSY_BIT
 
#define PL011_UARTCR_CTSEN
 
#define PL011_UARTCR_RTSEN
 
#define PL011_UARTCR_RTS   (1 << 11) /* Request to send */
 
#define PL011_UARTCR_DTR   (1 << 10) /* Data transmit ready. */
 
#define PL011_UARTCR_RXE   (1 << 9) /* Receive enable */
 
#define PL011_UARTCR_TXE   (1 << 8) /* Transmit enable */
 
#define PL011_UARTCR_LBE   (1 << 7) /* Loopback enable */
 
#define PL011_UARTCR_UARTEN   (1 << 0) /* UART Enable */
 
#define PL011_LINE_CONTROL   (PL011_UARTLCR_H_FEN | PL011_UARTLCR_H_WLEN_8)
 
#define PL011_UARTLCR_H_SPS   (1 << 7) /* Stick parity select */
 
#define PL011_UARTLCR_H_WLEN_8   (3 << 5)
 
#define PL011_UARTLCR_H_WLEN_7   (2 << 5)
 
#define PL011_UARTLCR_H_WLEN_6   (1 << 5)
 
#define PL011_UARTLCR_H_WLEN_5   (0 << 5)
 
#define PL011_UARTLCR_H_FEN   (1 << 4) /* FIFOs Enable */
 
#define PL011_UARTLCR_H_STP2   (1 << 3) /* Two stop bits select */
 
#define PL011_UARTLCR_H_EPS   (1 << 2) /* Even parity select */
 
#define PL011_UARTLCR_H_PEN   (1 << 1) /* Parity Enable */
 
#define PL011_UARTLCR_H_BRK   (1 << 0) /* Send break */
 

Functions

 check_member (pl011_uart, cellid3, 0xffc)
 

Macro Definition Documentation

◆ PL011_LINE_CONTROL

#define PL011_LINE_CONTROL   (PL011_UARTLCR_H_FEN | PL011_UARTLCR_H_WLEN_8)

Definition at line 67 of file pl011.h.

◆ PL011_UARTCR_CTSEN

#define PL011_UARTCR_CTSEN
Value:
(1 << 15) /* CTS hardware flow control
enable */

Definition at line 57 of file pl011.h.

◆ PL011_UARTCR_DTR

#define PL011_UARTCR_DTR   (1 << 10) /* Data transmit ready. */

Definition at line 60 of file pl011.h.

◆ PL011_UARTCR_LBE

#define PL011_UARTCR_LBE   (1 << 7) /* Loopback enable */

Definition at line 63 of file pl011.h.

◆ PL011_UARTCR_RTS

#define PL011_UARTCR_RTS   (1 << 11) /* Request to send */

Definition at line 59 of file pl011.h.

◆ PL011_UARTCR_RTSEN

#define PL011_UARTCR_RTSEN
Value:
(1 << 14) /* RTS hardware flow control
enable */

Definition at line 58 of file pl011.h.

◆ PL011_UARTCR_RXE

#define PL011_UARTCR_RXE   (1 << 9) /* Receive enable */

Definition at line 61 of file pl011.h.

◆ PL011_UARTCR_TXE

#define PL011_UARTCR_TXE   (1 << 8) /* Transmit enable */

Definition at line 62 of file pl011.h.

◆ PL011_UARTCR_UARTEN

#define PL011_UARTCR_UARTEN   (1 << 0) /* UART Enable */

Definition at line 64 of file pl011.h.

◆ PL011_UARTFR_BUSY

#define PL011_UARTFR_BUSY   (1 << 3) /* UART busy */

Definition at line 47 of file pl011.h.

◆ PL011_UARTFR_BUSY_BIT

#define PL011_UARTFR_BUSY_BIT
Value:
3 /* UART busy bit in UARTFR
register */

Definition at line 54 of file pl011.h.

◆ PL011_UARTFR_CTS

#define PL011_UARTFR_CTS   (1 << 0) /* Clear to send */

Definition at line 50 of file pl011.h.

◆ PL011_UARTFR_DCD

#define PL011_UARTFR_DCD   (1 << 2) /* Data carrier detect */

Definition at line 48 of file pl011.h.

◆ PL011_UARTFR_DSR

#define PL011_UARTFR_DSR   (1 << 1) /* Data set ready */

Definition at line 49 of file pl011.h.

◆ PL011_UARTFR_RI

#define PL011_UARTFR_RI   (1 << 8) /* Ring indicator */

Definition at line 42 of file pl011.h.

◆ PL011_UARTFR_RXFE

#define PL011_UARTFR_RXFE   (1 << 4) /* Receive FIFO empty */

Definition at line 46 of file pl011.h.

◆ PL011_UARTFR_RXFE_BIT

#define PL011_UARTFR_RXFE_BIT
Value:
4 /* Receive FIFO empty bit in
UARTFR register */

Definition at line 53 of file pl011.h.

◆ PL011_UARTFR_RXFF

#define PL011_UARTFR_RXFF   (1 << 6) /* Receive FIFO full */

Definition at line 44 of file pl011.h.

◆ PL011_UARTFR_TXFE

#define PL011_UARTFR_TXFE   (1 << 7) /* Transmit FIFO empty */

Definition at line 43 of file pl011.h.

◆ PL011_UARTFR_TXFF

#define PL011_UARTFR_TXFF   (1 << 5) /* Transmit FIFO full */

Definition at line 45 of file pl011.h.

◆ PL011_UARTFR_TXFF_BIT

#define PL011_UARTFR_TXFF_BIT
Value:
5 /* Transmit FIFO full bit in
UARTFR register */

Definition at line 52 of file pl011.h.

◆ PL011_UARTLCR_H_BRK

#define PL011_UARTLCR_H_BRK   (1 << 0) /* Send break */

Definition at line 79 of file pl011.h.

◆ PL011_UARTLCR_H_EPS

#define PL011_UARTLCR_H_EPS   (1 << 2) /* Even parity select */

Definition at line 77 of file pl011.h.

◆ PL011_UARTLCR_H_FEN

#define PL011_UARTLCR_H_FEN   (1 << 4) /* FIFOs Enable */

Definition at line 75 of file pl011.h.

◆ PL011_UARTLCR_H_PEN

#define PL011_UARTLCR_H_PEN   (1 << 1) /* Parity Enable */

Definition at line 78 of file pl011.h.

◆ PL011_UARTLCR_H_SPS

#define PL011_UARTLCR_H_SPS   (1 << 7) /* Stick parity select */

Definition at line 70 of file pl011.h.

◆ PL011_UARTLCR_H_STP2

#define PL011_UARTLCR_H_STP2   (1 << 3) /* Two stop bits select */

Definition at line 76 of file pl011.h.

◆ PL011_UARTLCR_H_WLEN_5

#define PL011_UARTLCR_H_WLEN_5   (0 << 5)

Definition at line 74 of file pl011.h.

◆ PL011_UARTLCR_H_WLEN_6

#define PL011_UARTLCR_H_WLEN_6   (1 << 5)

Definition at line 73 of file pl011.h.

◆ PL011_UARTLCR_H_WLEN_7

#define PL011_UARTLCR_H_WLEN_7   (2 << 5)

Definition at line 72 of file pl011.h.

◆ PL011_UARTLCR_H_WLEN_8

#define PL011_UARTLCR_H_WLEN_8   (3 << 5)

Definition at line 71 of file pl011.h.

Function Documentation

◆ check_member()

check_member ( pl011_uart  ,
cellid3  ,
0xffc   
)