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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <bootblock_common.h>
#include <soc/soc.h>
#include <soc/spi.h>
#include <soc/uart.h>
#include <soc/gpio.h>
#include <spi_flash.h>
#include <console/console.h>
#include <fmap.h>
#include "mainboard.h"
Go to the source code of this file.
Functions | |
void | bootblock_mainboard_early_init (void) |
static void | configure_spi_flash (void) |
static void | protect_ro_rgn_spi_flash (void) |
Handle flash write protection. More... | |
void | bootblock_mainboard_init (void) |
Definition at line 13 of file bootblock.c.
References CONFIG, ELGON_GPIO_ERROR_LED, ELGON_GPIO_UART_SEL, gpio_output(), uart_is_enabled(), and uart_setup().
Definition at line 82 of file bootblock.c.
References configure_spi_flash(), and protect_ro_rgn_spi_flash().
Definition at line 27 of file bootblock.c.
References ELGON_GPIO_SPI_MUX, gpio_output(), and spi_init_custom().
Referenced by bootblock_mainboard_init().
Handle flash write protection.
This code verifies the write-protection on each boot. Enabling the write protection does only run on the first boot. An error is fatal as it breaks the Chain Of Trust.
Definition at line 48 of file bootblock.c.
References BIOS_ERR, BIOS_INFO, BIOS_WARNING, boot_device_spi_flash(), die(), fmap_locate_area(), printk, spi_flash_is_write_protected(), spi_flash_set_write_protected(), spi_flash_status(), and SPI_WRITE_PROTECTION_PIN.
Referenced by bootblock_mainboard_init().