coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <bootblock_common.h>
4 #include <soc/soc.h>
5 #include <soc/spi.h>
6 #include <soc/uart.h>
7 #include <soc/gpio.h>
8 #include <spi_flash.h>
9 #include <console/console.h>
10 #include <fmap.h>
11 #include "mainboard.h"
12 
14 {
15  /* Route UART0 to CON1 */
17 
18  /* Turn off error LED */
20 
21  if (CONFIG(BOOTBLOCK_CONSOLE)) {
22  if (!uart_is_enabled(CONFIG_UART_FOR_CONSOLE))
23  uart_setup(CONFIG_UART_FOR_CONSOLE, CONFIG_TTYS0_BAUD);
24  }
25 }
26 
27 static void configure_spi_flash(void)
28 {
29  /* The maximum SPI frequency for error-free transmission is at 30 MHz */
30  spi_init_custom(0, // bus
31  28000000, // speed Hz
32  0, // idle low disabled
33  0, // zero idle cycles between transfers
34  0, // MSB first
35  0, // Chip select 0
36  1); // assert is high
37 
38  /* Route SPI to SoC */
40 }
41 
42 /**
43  * Handle flash write protection.
44  * This code verifies the write-protection on each boot.
45  * Enabling the write protection does only run on the first boot.
46  * An error is fatal as it breaks the Chain Of Trust.
47  */
48 static void protect_ro_rgn_spi_flash(void)
49 {
50  const struct spi_flash *flash = boot_device_spi_flash();
51  const char *fmapname = "WP_RO";
52  struct region ro_rgn;
53 
54  if (fmap_locate_area(fmapname, &ro_rgn)) {
55  printk(BIOS_ERR, "%s: No %s FMAP section.\n", __func__,
56  fmapname);
57  die("Can't verify flash protections!");
58  }
59 
60  u8 reg8 = 0;
61  spi_flash_status(flash, &reg8);
62 
63  /* Check if SRP0 is set and RO region is protected */
64  if (!(reg8 & 0x80) ||
65  spi_flash_is_write_protected(flash, &ro_rgn) != 1) {
66  printk(BIOS_WARNING, "%s: FMAP section %s is not write-protected\n",
67  __func__, fmapname);
68 
69  /*
70  * Need to protect flash region :
71  * WP_RO read only and use /WP pin
72  * non-volatile programming
73  */
74  if (spi_flash_set_write_protected(flash, &ro_rgn,
76  die("Failed to write-protect WP_RO region!");
77  }
78  printk(BIOS_INFO, "%s: FMAP section %s is write-protected\n",
79  __func__, fmapname);
80 }
81 
83 {
86 }
const struct spi_flash * boot_device_spi_flash(void)
#define printk(level,...)
Definition: stdlib.h:16
void __noreturn die(const char *fmt,...)
Definition: die.c:17
@ CONFIG
Definition: dsi_common.h:201
int fmap_locate_area(const char *name, struct region *r)
Definition: fmap.c:164
void gpio_output(gpio_t gpio, int value)
Definition: gpio.c:194
__weak void bootblock_mainboard_init(void)
Definition: bootblock.c:19
__weak void bootblock_mainboard_early_init(void)
Definition: bootblock.c:16
#define BIOS_INFO
BIOS_INFO - Expected events.
Definition: loglevel.h:113
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
Definition: loglevel.h:72
#define BIOS_WARNING
BIOS_WARNING - Bad configuration.
Definition: loglevel.h:86
static void configure_spi_flash(void)
Definition: bootblock.c:27
static void protect_ro_rgn_spi_flash(void)
Handle flash write protection.
Definition: bootblock.c:48
#define ELGON_GPIO_ERROR_LED
Definition: mainboard.h:3
#define ELGON_GPIO_UART_SEL
Definition: mainboard.h:5
#define ELGON_GPIO_SPI_MUX
Definition: mainboard.h:4
void spi_init_custom(const size_t bus, const size_t speed_hz, const size_t idle_low, const size_t idle_cycles, const size_t lsb_first, const size_t chip_select, const size_t assert_is_low)
Init SPI with custom parameters and enable SPI controller.
Definition: spi.c:261
int uart_setup(const size_t bus, int baudrate)
Setup UART with desired BAUD rate in 8N1, no parity mode.
Definition: uart.c:141
int uart_is_enabled(const size_t bus)
Returns the UART state.
Definition: uart.c:120
int spi_flash_set_write_protected(const struct spi_flash *flash, const struct region *region, const enum spi_flash_status_reg_lockdown mode)
Definition: spi_flash.c:598
int spi_flash_is_write_protected(const struct spi_flash *flash, const struct region *region)
Definition: spi_flash.c:576
int spi_flash_status(const struct spi_flash *flash, u8 *reg)
Definition: spi_flash.c:568
@ SPI_WRITE_PROTECTION_PIN
Definition: spi_flash.h:31
uint8_t u8
Definition: stdint.h:45
Definition: region.h:76