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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <device/mmio.h>
#include <assert.h>
#include <delay.h>
#include <soc/clock.h>
#include <soc/saradc.h>
#include <stdint.h>
#include <timer.h>
Go to the source code of this file.
Data Structures | |
struct | rk3399_saradc_regs |
Macros | |
#define | ADC_STOP 0 |
#define | INT_EN (1 << 5) |
#define | ADC_PWR_CTRL (1 << 3) |
#define | ADC_CHN_SEL_MASK 7 |
#define | ADC_CHN_SEL_SHIFT 0 |
#define | DATA_MASK 0x3FF |
#define | SARADC_HZ (4*MHz) |
#define | SARADC_MAX_CHANNEL 6 |
#define | SARADC_DELAY_PU (1 * 1000 * 1000 * 1000 / SARADC_HZ * 4) |
Functions | |
check_member (rk3399_saradc_regs, dly_pu_soc, 0xc) | |
u32 | get_saradc_value (u32 chn) |
Variables | |
struct rk3399_saradc_regs * | rk3399_saradc = (void *)SARADC_BASE |
#define SARADC_DELAY_PU (1 * 1000 * 1000 * 1000 / SARADC_HZ * 4) |
check_member | ( | rk3399_saradc_regs | , |
dly_pu_soc | , | ||
0xc | |||
) |
Definition at line 39 of file saradc.c.
References ADC_CHN_SEL_MASK, ADC_CHN_SEL_SHIFT, ADC_PWR_CTRL, ADC_STOP, assert, clrbits32, clrsetbits32, rk3399_saradc_regs::ctrl, rk3399_saradc_regs::data, DATA_MASK, read32(), rk3399_saradc, rkclk_configure_saradc(), SARADC_DELAY_PU, SARADC_HZ, SARADC_MAX_CHANNEL, setbits32, rk3399_saradc_regs::stas, stopwatch_expired(), stopwatch_init_msecs_expire(), and udelay().
Referenced by get_index().
struct rk3399_saradc_regs* rk3399_saradc = (void *)SARADC_BASE |
Definition at line 19 of file saradc.c.
Referenced by get_saradc_value().