coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
cpu.h File Reference
#include <device/device.h>
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Macros

#define C_STATE_LATENCY_CONTROL_0_LIMIT   0x4e
 
#define C_STATE_LATENCY_CONTROL_1_LIMIT   0x76
 
#define C_STATE_LATENCY_CONTROL_2_LIMIT   0x94
 
#define C_STATE_LATENCY_CONTROL_3_LIMIT   0xfa
 
#define C_STATE_LATENCY_CONTROL_4_LIMIT   0x14c
 
#define C_STATE_LATENCY_CONTROL_5_LIMIT   0x3f2
 
#define C1_POWER   0x3e8
 
#define C3_POWER   0x1f4
 
#define C6_POWER   0x15e
 
#define C7_POWER   0xc8
 
#define C8_POWER   0xc8
 
#define C9_POWER   0xc8
 
#define C10_POWER   0xc8
 
#define C_STATE_LATENCY_MICRO_SECONDS(limit, base)    (((1 << ((base)*5)) * (limit)) / 1000)
 
#define C_STATE_LATENCY_FROM_LAT_REG(reg)
 

Functions

u32 cpu_family_model (void)
 
u32 cpu_stepping (void)
 
int cpu_is_ult (void)
 

Macro Definition Documentation

◆ C10_POWER

#define C10_POWER   0xc8

Definition at line 23 of file cpu.h.

◆ C1_POWER

#define C1_POWER   0x3e8

Definition at line 17 of file cpu.h.

◆ C3_POWER

#define C3_POWER   0x1f4

Definition at line 18 of file cpu.h.

◆ C6_POWER

#define C6_POWER   0x15e

Definition at line 19 of file cpu.h.

◆ C7_POWER

#define C7_POWER   0xc8

Definition at line 20 of file cpu.h.

◆ C8_POWER

#define C8_POWER   0xc8

Definition at line 21 of file cpu.h.

◆ C9_POWER

#define C9_POWER   0xc8

Definition at line 22 of file cpu.h.

◆ C_STATE_LATENCY_CONTROL_0_LIMIT

#define C_STATE_LATENCY_CONTROL_0_LIMIT   0x4e

Definition at line 9 of file cpu.h.

◆ C_STATE_LATENCY_CONTROL_1_LIMIT

#define C_STATE_LATENCY_CONTROL_1_LIMIT   0x76

Definition at line 10 of file cpu.h.

◆ C_STATE_LATENCY_CONTROL_2_LIMIT

#define C_STATE_LATENCY_CONTROL_2_LIMIT   0x94

Definition at line 11 of file cpu.h.

◆ C_STATE_LATENCY_CONTROL_3_LIMIT

#define C_STATE_LATENCY_CONTROL_3_LIMIT   0xfa

Definition at line 12 of file cpu.h.

◆ C_STATE_LATENCY_CONTROL_4_LIMIT

#define C_STATE_LATENCY_CONTROL_4_LIMIT   0x14c

Definition at line 13 of file cpu.h.

◆ C_STATE_LATENCY_CONTROL_5_LIMIT

#define C_STATE_LATENCY_CONTROL_5_LIMIT   0x3f2

Definition at line 14 of file cpu.h.

◆ C_STATE_LATENCY_FROM_LAT_REG

#define C_STATE_LATENCY_FROM_LAT_REG (   reg)
Value:
C_STATE_LATENCY_MICRO_SECONDS(C_STATE_LATENCY_CONTROL_ ##reg## _LIMIT, \
(IRTL_1024_NS >> 10))
#define IRTL_1024_NS
Definition: haswell.h:72
#define C_STATE_LATENCY_MICRO_SECONDS(limit, base)
Definition: cpu.h:25

Definition at line 27 of file cpu.h.

◆ C_STATE_LATENCY_MICRO_SECONDS

#define C_STATE_LATENCY_MICRO_SECONDS (   limit,
  base 
)     (((1 << ((base)*5)) * (limit)) / 1000)

Definition at line 25 of file cpu.h.

Function Documentation

◆ cpu_family_model()

u32 cpu_family_model ( void  )

Referenced by igd_get_cdclk_broadwell(), igd_get_cdclk_haswell(), igd_init(), initialize_vr_config(), and pcie_enable_clock_gating().

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◆ cpu_is_ult()

int cpu_is_ult ( void  )

Referenced by igd_get_cdclk_broadwell(), and igd_get_cdclk_haswell().

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◆ cpu_stepping()

u32 cpu_stepping ( void  )

Referenced by gma_pm_init_post_vbios(), gma_pm_init_pre_vbios(), igd_init(), and northbridge_dmi_init().

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