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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <raminit_common.h>
Data Fields | |
u16 | rcven |
u8 | rx_dqs_p |
u8 | rx_dqs_n |
int | tx_dq |
u16 | tx_dqs |
Definition at line 339 of file raminit_common.h.
u16 ram_rank_timings::ram_lane_timings::rcven |
Definition at line 341 of file raminit_common.h.
Referenced by compute_final_logic_delay(), does_lane_work(), find_rcven_pi_coarse(), find_roundtrip_latency(), fine_tune_rcven_pi(), get_logic_delay_delta(), normalize_training(), program_timings(), and receive_enable_calibration().
u8 ram_rank_timings::ram_lane_timings::rx_dqs_n |
Definition at line 343 of file raminit_common.h.
Referenced by aggressive_read_training(), find_agrsv_read_margin(), find_predefined_pattern(), find_read_mpr_margin(), program_timings(), and read_mpr_training().
u8 ram_rank_timings::ram_lane_timings::rx_dqs_p |
Definition at line 342 of file raminit_common.h.
Referenced by aggressive_read_training(), find_agrsv_read_margin(), find_predefined_pattern(), find_read_mpr_margin(), program_timings(), and read_mpr_training().
int ram_rank_timings::ram_lane_timings::tx_dq |
Definition at line 346 of file raminit_common.h.
Referenced by aggressive_write_training(), program_timings(), test_command_training(), and tx_dq_write_leveling().
u16 ram_rank_timings::ram_lane_timings::tx_dqs |
Definition at line 347 of file raminit_common.h.
Referenced by program_timings(), train_write_flyby(), and write_level_rank().