#include <device/device.h>
#include <types.h>
Go to the source code of this file.
◆ ACPI_CPU_CONTROL
◆ ACPI_GPE0_BLK
◆ ACPI_PM1_CNT_BLK
◆ ACPI_PM_EVT_BLK
◆ ACPI_PM_TMR_BLK
◆ ACPI_SMI_CMD_CST_CONTROL
#define ACPI_SMI_CMD_CST_CONTROL 0xde |
◆ ACPI_SMI_CMD_DISABLE
#define ACPI_SMI_CMD_DISABLE 0xbe |
◆ ACPI_SMI_CMD_ENABLE
#define ACPI_SMI_CMD_ENABLE 0xef |
◆ ACPI_SMI_CMD_PST_CONTROL
#define ACPI_SMI_CMD_PST_CONTROL 0xad |
◆ ACPI_SMI_CMD_S4_REQ
#define ACPI_SMI_CMD_S4_REQ 0xc0 |
◆ ACPI_SMI_CTL_PORT
#define ACPI_SMI_CTL_PORT 0xb2 |
◆ BIOSRAM_DATA
#define BIOSRAM_DATA 0xcd5 |
◆ BIOSRAM_INDEX
#define BIOSRAM_INDEX 0xcd4 |
◆ DECODE_ENABLE_ACPIUC_PORT
#define DECODE_ENABLE_ACPIUC_PORT BIT(30) |
◆ DECODE_ENABLE_ADLIB_PORT
#define DECODE_ENABLE_ADLIB_PORT BIT(31) |
◆ DECODE_ENABLE_AUDIO_PORT0
#define DECODE_ENABLE_AUDIO_PORT0 BIT(14) |
◆ DECODE_ENABLE_AUDIO_PORT1
#define DECODE_ENABLE_AUDIO_PORT1 BIT(15) |
◆ DECODE_ENABLE_AUDIO_PORT2
#define DECODE_ENABLE_AUDIO_PORT2 BIT(16) |
◆ DECODE_ENABLE_AUDIO_PORT3
#define DECODE_ENABLE_AUDIO_PORT3 BIT(17) |
◆ DECODE_ENABLE_FDC_PORT0
#define DECODE_ENABLE_FDC_PORT0 BIT(26) |
◆ DECODE_ENABLE_FDC_PORT1
#define DECODE_ENABLE_FDC_PORT1 BIT(27) |
◆ DECODE_ENABLE_GAME_PORT
#define DECODE_ENABLE_GAME_PORT BIT(28) |
◆ DECODE_ENABLE_KBC_PORT
#define DECODE_ENABLE_KBC_PORT BIT(29) |
◆ DECODE_ENABLE_MIDI_PORT0
#define DECODE_ENABLE_MIDI_PORT0 BIT(18) |
◆ DECODE_ENABLE_MIDI_PORT1
#define DECODE_ENABLE_MIDI_PORT1 BIT(19) |
◆ DECODE_ENABLE_MIDI_PORT2
#define DECODE_ENABLE_MIDI_PORT2 BIT(20) |
◆ DECODE_ENABLE_MIDI_PORT3
#define DECODE_ENABLE_MIDI_PORT3 BIT(21) |
◆ DECODE_ENABLE_MSS_PORT0
#define DECODE_ENABLE_MSS_PORT0 BIT(22) |
◆ DECODE_ENABLE_MSS_PORT1
#define DECODE_ENABLE_MSS_PORT1 BIT(23) |
◆ DECODE_ENABLE_MSS_PORT2
#define DECODE_ENABLE_MSS_PORT2 BIT(24) |
◆ DECODE_ENABLE_MSS_PORT3
#define DECODE_ENABLE_MSS_PORT3 BIT(25) |
◆ DECODE_ENABLE_PARALLEL_PORT0
#define DECODE_ENABLE_PARALLEL_PORT0 BIT(0) |
◆ DECODE_ENABLE_PARALLEL_PORT1
#define DECODE_ENABLE_PARALLEL_PORT1 BIT(1) |
◆ DECODE_ENABLE_PARALLEL_PORT2
#define DECODE_ENABLE_PARALLEL_PORT2 BIT(2) |
◆ DECODE_ENABLE_PARALLEL_PORT3
#define DECODE_ENABLE_PARALLEL_PORT3 BIT(3) |
◆ DECODE_ENABLE_PARALLEL_PORT4
#define DECODE_ENABLE_PARALLEL_PORT4 BIT(4) |
◆ DECODE_ENABLE_PARALLEL_PORT5
#define DECODE_ENABLE_PARALLEL_PORT5 BIT(5) |
◆ DECODE_ENABLE_SERIAL_PORT0
#define DECODE_ENABLE_SERIAL_PORT0 BIT(6) |
◆ DECODE_ENABLE_SERIAL_PORT1
#define DECODE_ENABLE_SERIAL_PORT1 BIT(7) |
◆ DECODE_ENABLE_SERIAL_PORT2
#define DECODE_ENABLE_SERIAL_PORT2 BIT(8) |
◆ DECODE_ENABLE_SERIAL_PORT3
#define DECODE_ENABLE_SERIAL_PORT3 BIT(9) |
◆ DECODE_ENABLE_SERIAL_PORT4
#define DECODE_ENABLE_SERIAL_PORT4 BIT(10) |
◆ DECODE_ENABLE_SERIAL_PORT5
#define DECODE_ENABLE_SERIAL_PORT5 BIT(11) |
◆ DECODE_ENABLE_SERIAL_PORT6
#define DECODE_ENABLE_SERIAL_PORT6 BIT(12) |
◆ DECODE_ENABLE_SERIAL_PORT7
#define DECODE_ENABLE_SERIAL_PORT7 BIT(13) |
◆ HUDSON_ACPI_IO_BASE
#define HUDSON_ACPI_IO_BASE 0x800 |
◆ LPC_IO_OR_MEM_DECODE_ENABLE
#define LPC_IO_OR_MEM_DECODE_ENABLE 0x48 |
◆ LPC_IO_PORT_DECODE_ENABLE
#define LPC_IO_PORT_DECODE_ENABLE 0x44 |
◆ LPC_TRUSTED_PLATFORM_MODULE
#define LPC_TRUSTED_PLATFORM_MODULE 0x7c |
◆ PM2_DATA
◆ PM2_INDEX
◆ PM_DATA
◆ PM_INDEX
◆ REV_HUDSON_A11
#define REV_HUDSON_A11 0x11 |
◆ REV_HUDSON_A12
#define REV_HUDSON_A12 0x12 |
◆ SPI_BASE_ADDRESS
#define SPI_BASE_ADDRESS 0xFEC10000 |
◆ SPI_ROM_ENABLE
#define SPI_ROM_ENABLE 0x02 |
◆ SPIROM_BASE_ADDRESS_REGISTER
#define SPIROM_BASE_ADDRESS_REGISTER 0xA0 |
◆ TPM_12_EN
◆ TPM_LEGACY_EN
#define TPM_LEGACY_EN BIT(2) |
◆ hudson_clk_output_48Mhz()
◆ hudson_enable()
◆ hudson_ide_enable()
static int hudson_ide_enable |
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inlinestatic |
◆ hudson_lpc_decode()
◆ hudson_lpc_port80()
◆ hudson_pci_port80()
◆ hudson_sata_enable()
static int hudson_sata_enable |
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void |
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inlinestatic |